Hello Brandon, Thank you for your message. Indeed there is a lot information still lacking in what I described. Before replacing the LPC2138, we resoldered the leads of the old processors (all of them). The pin connections were also visually inspected (with a 10x magnifier). I do not recall whether the spurious interrupt was "deterministic" on the second board (the one that is now repaired). However, on our first board where this occurred, the issue "appeared" deterministic. In fact, on the first board we discovered the problem because we experienced task starvation. This, in turn, was caused by an interrupt being generated immediately after switching a GPIO pin 0.16 to EINT0. We are switching the pin between GPIO and EINT for the same reason (basically) as the one described in your original message. I said that it "appeared" deterministic, because adding pressure on this board made the spurious interrupts less frequent or made them disappear alltogether. However, without external pressure, the low priority task could remain starved for a very, very long time. Since then, I have adapted my firmware to detect this particular spurious interrupt issue, and cause a reset with a diagnostic message if it appears (even only once). For the second board, I do therefore not know if the spurious interrupt was deterministically appearing after each switch from GPIO to EINT, or just (say) 5 out of 10 times. Kind regards, Thiadmer
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Re: CONFIRMED: WARNING: problem reading state of external interrupt lines.
2006-03-22 by Thiadmer Riemersma (ITB CompuPhase)
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