Lpc2000

--- In lpc2000@yahoogroups.com, "jayasooriah" <jayasooriah@...> 
wrote:
>
> --- In lpc2000@yahoogroups.com, "theothervmax" <vmax@> wrote:
> > AFAIK:
> > Max UART speed is PCLK/16
> 
> On LPC2292, with 14.7456 MHz xtal, PLL disabled, VPBDIV set to 1 
and
> UART0 baud rate divisor set to 4, it runs okay at 230400 baud.
> 
> Jaya
>

From the UM:
"The UART0 Divisor Latch is part of the UART0 Baud Rate Generator 
and holds the value used to divide the VPB clock (pclk) in
order to produce the baud rate clock, which must be 16x the desired 
baud rate."
It's all right with your example, baud rate divisor set to 4, but 
you should not forget that this frequency has been divided by 16 to 
produce this baud rate: 14745600/4/16 = 230400.
So, the maximum baudrate cannot exceed pclk/16 anyway.

Regards,
Max