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Re: Flash Access at 0 wait state at 60 MHz ?

2006-04-12 by jayasooriah

--- In lpc2000@yahoogroups.com, "croquettegnu" <croquettegnu@...> wrote:
>
> Good morning,
> 
> Sorry for this newbie question but the MAM module confused me a lot
> 
> I have understood that the MAM module allows operating up to 60MHz but
> is it possible at 0 wait state ?
> 
> On the MAM usage notes, it is refered that the MAMTIM must be
> configured   regarding the the operating frequency, for example for
> system clock faster than 40 MHz, MAMTIM must be set to 3 CCLKs, does
> it mean that we introduce 2 wait states ?
> 
> Thanks in advance
> 
> Frederic

LPC flash is 50ns flash memory organised 128-bit wide.  Hence flash
reads and writes flash are buffered four words at a time.

Philips says "MAM provides nearly zero-wait state execution" from
on-chip flash.  I suspect the "nearly" means "on the average when
access patterns match prefetching".

The first access after a branch or exception would take 50ns or 3 CCLKs.

MAM has other problems. Have a look at:

http://article.gmane.org/gmane.comp.hardware.arm.lpc2100/7556

Hope this helps.

Jaya

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