Jaya, The watchdog generates a reset when it expires - see any of the user Manual's description of the watchdog and reset sequence for details. From memory, reset is the highest priority exception on an ARM and cannot be masked. Therefore, whatever is being observed in this case, isn't related to priority. If you have some specific evidence of a problem with the watchdog, maybe you could post the details, instead of making vague references to it? Thanks Brendan --- In lpc2000@yahoogroups.com, "jayasooriah" <jayasooriah@...> wrote: > It is because the watchdog timer on LPC is not wired to the Reset > interrupt priority level of ARM7. Thus the Data Abort exception that > you are not dismissing locks out watchdog reset. > > You could go down the chain (Data Abort, FIQ, IRQ, Prefetch Abort, > then Undefined Instruction/SWI to discover at what level the watchdog > reset is wired to ... I would if I relied on the watchdog to get me > out undefined situations, but then I only use the watchdog to trigger > a reset when I want it to. > > It is not clear if this behaviour in LPC is a design or implementation > error. > > Jaya >
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Re: WDT reset while in an ISR
2006-04-18 by brendanmurphy37
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