Lpc2000

Jaya,

You can deny it all you want. The fact is that in:

http://groups.yahoo.com/group/lpc2000/message/15370

you made the following assertion:

"It is because the watchdog timer on LPC is not wired to the Reset
interrupt priority level of ARM7.  Thus the Data Abort exception that
you are not dismissing locks out watchdog reset."

As I pointed out, this has no factual basis whatsoever. 

All Ralph and I asked you to do was provide some proof to the 
contrary. I've now given up on this, as asking you for evidence for 
your claims gets nowhere. Denying you made them in the first place is 
downright bizarre: the evidence you made the claim is there for all 
to see.

I will agree with one thing you say: "this kind of argument gets 
nowhere".

Brendan.

--- In lpc2000@yahoogroups.com, "jayasooriah" <jayasooriah@...> wrote:
>
> Dear Ralph,
> 
> This kind of argument gets nowhere.
> 
> It was not an assertion, but a response to a claim by the poster who
> started the thread.  The original claim was that while in Data Abort
> exception watchdog timer overflow does not trigger a reset.
> 
> If only one did not get bogged down by misinterpreting the 
definitive
> form of expression I use in my *response*, perhaps one would have 
seen
> from further posts I made on the same thread that:
> 
> 1/  I do not used the watchdog for this purpose;
> 2/  I have not verified the original claim; and
> 3/  I do not have the means to verify the claim.
> 
> [My explanation was only in the context of the impressive LPC family
> errata sheets, past discussions about watchdog timer problems and 
the
> work around proposed by Philips.]
> 
> Thus I am deeply sorry that I am unable help you or the broader LPC
> community to investigate this matter further at this time
> 
> Perhaps someone else can liaise directly with the original poster 
and
> tell us what the findings are.
> 
> Kind regards,
> 
> Jaya
> 
> --- In lpc2000@yahoogroups.com, Ralph Hempel <rhempel@> wrote:
> >
> > jayasooriah wrote:
> > 
> > > Please refrain from ask me anything if you do not need my help.
> > > 
> > > I do not wish to engage with you on this or any other topic.
> > 
> > Honestly Jaya, when you make assertions like:
> > 
> >    It is because the watchdog timer on LPC is not wired to the 
Reset
> >    interrupt priority level of ARM7.  Thus the Data Abort 
exception that
> >    you are not dismissing locks out watchdog reset.
> > 
> > and then someone asks you to back up the assertion with
> > evidence from either a manual or specific code that shows the
> > breakage, they are not asking for your help.
> > 
> > As a scientist, it is simply irresponsible to make a claim and
> > not be willing to share detailed, reproducible steps that
> > lead you to your conclusion.
> > 
> > If someone challenges (with detailed, reproducible steps) one
> > of your conclusions, it must be refuted in a similar way, or
> > the point must be conceded.
> > 
> > Please respond to the original question, which is to provide
> > proof that the watchdog timer reset can be "locked out".
> > 
> > I'm not asking for your help on a specific question here, I'm
> > asking you to help the broader LPC community to determine if the
> > WDT has a real problem.
> > 
> > Ralph
>