Lpc2000

Quoting johnthomasedwardtimm <area51@...>:

> I was wondering if anyone has seen the errata on the UART in terms of
> the hardware race condition that Robert pointed out many posts ago.
> Also, I was wondering if the read-the-IIR-once-and-only-once solution
> is the workaround.  The errata states that reading the IIR will only
> clear the THRE interrupt on UART1, however, the user's manual states
> otherwise.  I'm waiting to hear back from a Philips FAE on this.

It appears that this is taken care of by turning the FIFOs on.  I suspect that
with the FIFOs off there is a race condition but I suspect all we'll ever know
is that we have to turn the FOFOs on.  Reading the IIR only once per interrupt
does mask it somewhat but someone reported still missing interrupts in that
case (I'd credit the reporter but I'm away from my notes, my 
apologies). Turning on the FIFO has eliminated the problem , at least 
so far.  And there is
a one line note in the UM stating that the FIFO must be turned on.

Robert