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Re: re : LPC hardware+software problems (was: UART0 interrupts without FIFOs)

2006-04-30 by jayasooriah

--- In lpc2000@yahoogroups.com, Robert Adsett <subscriptions@...> wrote:
> So the difference would be
>          - Leaves a different signature behind
>          - Leaves the I/O in the state it was, quite possibly
increasing 
> the latency to a known good state.
> 
> The LPC does the first as well,  The second it does differently. 
Better as 
> far as I'm concerned.  However both are reasonably easily dealt
with.  Only 
> when running close to the edge would that be a deciding factor in
choosing 
> one over the other.

The approach you refer to as "better" is IMO flawed for the following
reason:

In the hardware approach, external bus sizing only takes place on
power on reset.  External bus is invariant for any given system and
thus a watchdog (or even external reset) does not change this.

In the LPC approach, the watchdog reset does not preserve bus size
setting because it does a system reset as a blind reset.

So when a watchdog fires, external bus sizing has to be done all over
again by software ... but the pins now have taken on a different role
because these are used as GPIO!

There is no way out.  Watchdog reset and "GPIO" usage of BOOT0 and
BOOT1 pins are mutually exclusive.  The external device driving this
input has no way of knowing when the watchdog fires.

In fact, if you think about this carefully, if you are using watchdog
timer, then you cannot use these pins for output either because these
have to be strapped so that it does the right thing every time the
watchdog fires.

In an earlier post I mistakenly said these were analog inputs.  You
are right that these are digital inputs.

Analog or digital input or output, the fact remains that these pins
cannot be used if one uses the watchdog.  I bet Philips throught it
would be a good idea to sell these bus size strapping pins as GPIO!

Jaya

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