Lpc2000

--- In lpc2000@yahoogroups.com, Ralph Hempel <rhempel@...> wrote:
> > In the hardware approach, external bus sizing only takes place on
> > power on reset.  External bus is invariant for any given system and
> > thus a watchdog (or even external reset) does not change this.
> 
> This is not always true an all chip families. In fact, I had
> an HC16 system that used an external 8 bit wide FLASH for code and
> config data storage.

I do not see the point in you bringing up HC16 example.  Is this to
say that bus sizing on all types of reset is a good thing?

> At boot time, the 8 bit FLASH provided basic bootstrap code, which
> included copying code and data to faster 16 bit RAM. The HC16 had smart
> chip select logic than knew whether a peripheral was 8 or 16 bits
> wide.

The point I was making (that you seem to have missed) is that when
pins are allocated for bus sizing, *and* bus sizing takes place on all
kinds of reset (including that fired by the watchdog) then you cannot
use these pins for any other purpose.

I arrived at this conclusion after fist hearing of some problems
reported in this forum and then when I had to solve this for a client.
 If I missed out something, I am very happy for someone to explain to
me what this is.

So far no one has explained how, and I gather some are not happy with
my expressing this conclusion because it is not reported in LPC
errata.  If you check the archives, I am sure you will find that
Philips Applicaion support did say (in a different way) that you
cannot use these pins if you are using watchdog timer, and that you
have to use external watchdog timer if you need to use these pins.

> > In the LPC approach, the watchdog reset does not preserve bus size
> > setting because it does a system reset as a blind reset.
> > 
> > So when a watchdog fires, external bus sizing has to be done all over
> > again by software ... but the pins now have taken on a different role
> > because these are used as GPIO!
> 
> That's the entire point. The watchdog fires and resets the system
> to a known state. The previous use of the pin is not relevant.

Here is where I asked the question as to what the purpose of watchdog
reset is.  On other processors that do bus sizing on power on reset
only, and because this information then cannot be by software, there
is no point in resetting this information on watchdog reset.

The situation with LPC is very different.  Since the boot loader
software does the bus sizing, and this information is lost when
watchdog fires a reset, it has no choice but to do this on every kind
of reset.

> > There is no way out.  Watchdog reset and "GPIO" usage of BOOT0 and
> > BOOT1 pins are mutually exclusive.  The external device driving this
> > input has no way of knowing when the watchdog fires.
> 
> I have not double checked this on the LPC parts, but on the HC16
> system I designed, only weak pullups were used on the pins that
> defined bus sizing and other at-reset conditions.

So what happens on a watchdog reset?  Does the external world that is
driving this pin know this event did occur?  If it does, how so on the
LPC?  If not, then the external device will surely over-ride weak
pull-ups.  See my point?

> Once the chip was up and running, the pins were used for things
> like address and data lines, and the pullups did not affect
> their operation.

I agree that as an address, which is *always* an output by the CPU,
which is not to be heeded unless the CPU asserts the necessary
strobes, and which the CPU does not do when taking a reset, then this
has no ill side effects.

In the case of LPC, if you used these pins as outputs, and you are
driving it low, the external device has to be prepared to see this pin
float when the watchdog reset occurs and I would not describe this as
a GPIO.

> Like I have suggested in a previous post, your continued lack
> of flexibility makes you appear arrogant, which is not one of the
> things I would be looking for in a consultant.

Different people look for different things.  [Incidentally, I am not
looking for work through this forum.]

Jaya