As per my understanding you can continue to service interrupts during the IAP erase. The ISR needs to live in SRAM and must not access flash. Tom --- In lpc2000@yahoogroups.com, "Bryce Schober" <bryce.schober@...> wrote: > > I just want to make sure that I'm reading this right before committing to > using a serial flash. It seems that the lpc21xx on-chip can't really be used > for eeprom emulation in real-time scenarios, since its sector erase takes > hundreds of milliseconds and is a blocking function. I guess that's why some > of philips' competitors have a separate data flash for such usage. The price > point of the lpc21xx doesn't look so good for us, when you have to tack on > an extra $1+ for an external SPI flash device. > > -- > Bryce Schober > > > [Non-text portions of this message have been removed] >
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Re: IAP Blocking for 400ms?
2006-05-10 by lpc2100
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