Lpc2000

Hi,

If your processor clock speed is reasonably fast (e.g. 60 Mhz), 
you'd see little impact on performance if you configure an FIQ 
interrupt to increment a single counter whenever the rising or 
falling edge happens. 

By pre-loading the banked ragisters before you start (e.g. with the 
address of the counter etc.), you'd probably get the code down to 
less than about six assembler instructions in total, and you 
probably wouldn't even have to save any context. Even with the 
standard interrupt latency, you'd almost certainly be less than 
about 30 cycles on average (being generous).

At 48KHz interrupt rate and a clock of 60 Mhz, you have 1250 cycles 
to play with: 30 of these to handle the interrupt, or 2.4% of the 
available CPU.

A much slower timer interrupt could periodically read (and reset) 
the counter to calculate the frequency.

Although it's not particularly "clever" (being something of a 
sledgehammer) it would work, and has the virtue of simplicity.

We've used 40 Khz interrupts and an interpolating filter to output 
an 8KHz sampled data (to reduce noise), and it works very well.

Regards
Brendan


--- In lpc2000@yahoogroups.com, "Andrew Berney" <amb@...> wrote:
>
> 
> Just a quick question to see if there's anyway of using the 
inbuilt timer
> functionality of a LPC2119 as a counter. Ie to count the number 
pulses
> (rising or falling edge) from an external source over a given time 
frame.
> Basically we have a pot that changes a source input frequency from 
36khz to
> around 48khz and driving an IRQ for each pulse doesn't strike me 
as being a
> good idea. All I need to realistically know is roughly what 
frequency it's
> being driven at.
> 
> Ideas?
> 
> Andy
>