Lpc2000

At 05:47 PM 11/22/03 -0500, you wrote:

>Setting the VPB divider to 1 in this configuration also seems to have an
>effect on the UART.   I haven't figured that out yet but what should be
>9600 baud drops to about 9000 baud.
>
>Robert Adsett

Got it.  Cleaning up by support and generalizing it so I could place it 
with some newlib support and I realized that I had misplaced the pll 
divider field by 1 bit, resulting in a value of 1/2 what I expected.  That 
means that the internal pll was running at ~120MHz which is below the 
156MHz specified minimum.  Apparently when that happens some peripherals 
notice the effect and others don't.

Robert

" 'Freedom' has no meaning of itself.  There are always restrictions,
be they legal, genetic, or physical.  If you don't believe me, try to
chew a radio signal. "

                         Kelvin Throop, III