--- In lpc2000@yahoogroups.com, "microbit" <microbit@c...> wrote:
> Look at PLLCFG register.
> If you for example are after 14.7 MHz * 4 = 58.8 MHz,
> then you would set the Multiplier(M) to 4, and the presaler (P)
> could for example be 2 - thus :
> Fcco = Fosc * M * 2 * P = 14.7 * 4 * 2 * 2 = 235.2 MHz.
> cclk = Fosc * M = 58.8 MHz.
The demo code supplied by Rowley has P set to 1 and M set to 4
(PLLCFG = 0x24) in their example giving 59Mhz with a 14.7Mhz
crystal. This gives a Fcco of 117Mhz which should be illegal.
Second, the data sheet shows "P" is a 2 bit value (bits 5 and 6 of
PLLCFG) , yet it talks about values for P in the range of 2 - 16!
Which is it Philips?
Third, Toggling an I/O pin in a while(1) loop I get periods of:
PLL OFF: 1150ns (should be 14.7Mhz)
PLLCFG = 0x61 (P=3, M=1): 577ns (should be 14.7Mhz but is 29Mhz?)
PLLCFG = 0x21 (P=1, M=1): 577ns (as above)
PLLCFG = 0x42 (P=2, M=2): 384ns (Should be 29.4Mhz but is 44Mhz?)
PLLCFG = 0x43 (P=2, M=3): 288ns (Should be 44Mhz but is 59Mhz?)
PLLCFG = 0x44 (P=2, M=4): 231ns (Should be 59Mhz but is 73.5Mhz?)
PLLCFG = 0x23 (P=1, M=4): 231ns (as above)
The above numbers are running from RAM with VPBDIV = 1 (full speed
peripherals). Because of the way I/O works on the Philips parts, you
don't get a 1:1 correlation between clock rate and I/O speed but the
above still show something is wrong? What's going on here?
> You need to change the "mov R1, # 0x24" instruction to
> change the prescaler ("divider") value.
> For example, 0x25 sets P to 2 instead of etc.
Not as I read the User Manual. 0x24 is P=1, M=4. 0x25 would be P=1,
M=5.Message
Re: PLL Issues (was Help: Rowley CrossStudio & Wiggler Problem)
2004-04-18 by nw_mcu
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