Lpc2000

--- In lpc2000@yahoogroups.com, "nw_mcu" <nw_mcu@y...> wrote:

OK, I've now confirmed the PLL problem! With my 2106, I get the 
following results:

PLL OFF: 1150ns (14.7Mhz)
PLLCFG = 0x61 (P=3, M=1): 577ns (should be 14.7Mhz but is 29Mhz)
PLLCFG = 0x21 (P=1, M=1): 577ns (as above)
PLLCFG = 0x42 (P=2, M=2): 384ns (Should be 29.4Mhz but is 44Mhz)
PLLCFG = 0x43 (P=2, M=3): 288ns (Should be 44Mhz but is 59Mhz)
PLLCFG = 0x44 (P=2, M=4): 231ns (Should be 59Mhz but is 73.5Mhz)
PLLCFG = 0x24 (P=1, M=4): 231ns (as above)

The above shows that P doesn't change the clock rate (we presume only 
Fcco), while the M value does but not in the way Philips documents.

Here's my set up to test the clock rate:

PINSEL0 = 0x0800; //enable MAT0.1 output pin
T0TCR = 0; //Timer off 
T0PR = 0; //No prescale
TOMR1 = 100; //match every 100 counts
T0MCR = 0x10; //clear timer on match1
T0EMR = 0x0fff; //enable match outputs
T0TCR = 1; //start the timer

while(1);

I put a Agilent digital scope on the MAT0.1 pin and the above code 
yields a MAT0.1 period of 1360nS using PLLCFG = 0x24.  If you divide 
by 100 you get a 13.6nS clock or 73.53 Mhz!

If you disable the PLL, you get a period of 6.80uS which is a 14.7Mhz 
clock.

So, for my LPC2106 at least, I'm absolutely convinced that a 
multiplier (M) of 4 is really 5!  The following Philips formula is 
wrong:

   cclk = M * Fosc

The correct forumla appears to be:

   cclk = (M + 1) * Fosc

As I said earlier, it's possible I somehow have a bad part, so if 
someone else could confirm this, that would be helpful?  If what I've 
measured is generally true, the Philips data is wrong and that's 
really disturbing for such a critical parameter.  The power 
consumption listed is also wrong (30ma at 60Mhz is really 44ma but 
that's already been discussed).  At 75Mhz, my 2106 draws 58ma.