Lpc2000

--- In lpc2000@yahoogroups.com, "jpmarm2004" <jpmarm2004@y...> wrote:
> --- In lpc2000@yahoogroups.com, Jens Hildebrandt
> <jens.hildebrandt@e...> wrote:
> > Karl Olsen wrote:
> > > The interrupt entry and exit code in gcc 3.2.x and older doesn't 
> > > work.  Either upgrade to gcc 3.3.x, where it works, or write the 
> > > entry/exit code yourself.
> > > 
> > > Regards,
> > > Karl Olsen
> > >  
> > 
> > Hi Karl,
> > 
> > thanks for the clear answer. I just wanted to be sure that an
> upgrade of gcc 
> > wouldn't be in vain (at least with respect to my problem).
> > 
> > Regards,
> > Jens
> Hi:
> I checked a code with GCC 3.4.0 and the code generated seems to be
> logically correct:
> 
> The following C code for testing GCC 3.4 Interrupt handling capability
> created the ARM assembler code shown below the C code:
>                                                                      
>                 
> C code:
> -------------------------------------------------
> void isr_IRQ()  __attribute__((interrupt("IRQ")));
> extern void dummy();
> void isr_IRQ()
> {
>         dummy();
> }
> ------------------------------------------------
> Assembler Code:
> --------------------------------
>         .file   "testInt.c"
>         .text
>         .align  2
>         .global isr_IRQ
>         .type   isr_IRQ, %function
> isr_IRQ:
>         @ Interrupt Service Routine.
>         @ args = 0, pretend = 0, frame = 0
>         @ frame_needed = 1, uses_anonymous_args = 0
>         str     ip, [sp, #-4]!  
>         mov     ip, sp          
>         stmfd   sp!, {r0, r1, r2, r3, fp, ip, lr, pc} 
>         sub     fp, ip, #4      
>         bl      dummy           
>         ldmfd   sp, {r0, r1, r2, r3, fp, sp, lr} 
>         ldmfd   sp!, {ip}       
>         subs    pc, lr, #4      // load pc with next instruction from
> interrupted program and restore CPSR (note the s bit)
>         .size   isr_IRQ, .-isr_IRQ
>         .ident  "GCC: (GNU) 3.4.0"
> ----------------------------------------                             
>         
> I don't have a system to check it out. Could anyone confirm if this is
> OK? 
> Regards
> Mathew
My apologies (newbie!)
I don't think subs instruction has the s bit set!
Could someone tell me how the CPSR is restored in the above code ?
Regards
Mathew