Lpc2000

At 10:28 AM 7/6/04 +0000, you wrote:

> > I also stumbled across this description. Obviously, this is a
>copy-and-paste
> > from the description of the '550-UART IP-Core.
>
>I thought it might be something like that. So given that the FIFO is
>preconfigured, how do I know when the FIFO is full?

In this respect, it behaves as all '550s.  When the THRE interrupt fires 
the FIFO is empty and you can put up to 16 bytes into it.  Something like

  case RECEIVE:
     for( i = 0; i <16; i++) {
          U0THR = buf[i];
      }
      break;

Oversimplified but it illustrates the point.

AFAIR this is documented in all of a sentence or maybe two.

BTW, I would be very interested if anyone else has run into the missing 
THRE interrupt symptoms I've seen.

Robert

" 'Freedom' has no meaning of itself.  There are always restrictions,
be they legal, genetic, or physical.  If you don't believe me, try to
chew a radio signal. "

                         Kelvin Throop, III