Lpc2000

At 12:00 PM 7/6/04 +0000, you wrote:

> >
> > In this respect, it behaves as all '550s.  When the THRE interrupt
>fires
> > the FIFO is empty and you can put up to 16 bytes into it.  Something
>like
> >
>
>I would like to be able to "top up" the FIFO when possible so that I
>can have more time before the next interupt. Trouble is I am not sure
>if I am intepreting the flags correctly, the THRE flag appears to be
>set even if just 1 byte has been written, so it is no use for seeing
>if the FIFO may be topped up.

There is no way to know when the transmit FIFO has been partially emptied 
(well you could time how long it was since it was last filled).

The THRE flag does just that it flags when the transmitter holding register 
is empty.  That means that there was nothing in the FIFO to re-fill it.

I can see that a transmitter FIFO would be a useful additional source to 
increase the allowable interrupt response latency but there is nothing in 
the uart to give it to you.

Robert

" 'Freedom' has no meaning of itself.  There are always restrictions,
be they legal, genetic, or physical.  If you don't believe me, try to
chew a radio signal. "

                         Kelvin Throop, III