Lpc2000

1) Other than the report from Tsvetan (messages 1236/1249/1257), is 
anyone aware of problems related to Power Supply sequencing or rise 
times?

2) Is anyone aware of any other problems of the processor going into 
a latchup state?

3) Robert (messages 1256, 1281, & 2536) and Bob (message 2533) say 
they have made tests which were not able to reproduce a supply 
sequencing problem.

Do you feel that you have also ruled out supply rise time as the 
problem?

4) Assuming Tsvetan's report is accurate (including that he held 
reset until all supplies were stable), he apparently did get the chip 
into some sort of latchup state (on 10% of his boards).

Does anyone have a viable theory as to the cause?

5) Questions for Tsvetan (comments from others welcome):

a) Other than the fact that changing the capacitor seemed to cure the 
problem, have you managed to determine anything more specific?  Do I 
understand correctly that you currently feel the problem is something 
other than simple power supply sequencing?

b) When unplugging your power supply, did you wait for both 3.3V and 
1.8V to fully drain, before plugging it back in?  i.e.: Could the 
fact that changing the capacitor fixed the problem, be more related 
to how far the 3.3V supply fell when unit was unplugged, rather than 
how fast it rises?

c) As others have suggested, could the problem be related to the rise 
time of the 3.3V supply, as opposed to the sequence in which supplies 
are applied?

d) I was not able to read your schematic on the web.  Are all items 
connected to processor i/o pins fed from the same 3.3V supply as the 
processor?  If not, could latch-up be related to some voltage mis-
match there?  (The data sheet says that the i/o pins are only 5V 
tolerant when the 3.3V supply is present.)

e) Could it be that an incorrect level was present on one of the pins 
which get sampled at reset (P0.14, DBGSEL, RTCK)?