Lpc2000

That clear things up big time. Thanks again. :) 

> Looks like you found a mistake in my header files.  The bit 
definitions
> for the Fifo Control Register should be as follows:
> 
> // FIFO Control Register bit definitions
> #define UFCR_FIFO_ENABLE    (1 << 0)    // FIFO Enable
> #define UFCR_RX_FIFO_RESET  (1 << 1)    // Reset Receive FIFO
> #define UFCR_TX_FIFO_RESET  (1 << 2)    // Reset Transmit FIFO
> #define UFCR_FIFO_TRIG1     (0 << 6)    // Trigger @ 1 character 
in FIFO
> #define UFCR_FIFO_TRIG4     (1 << 6)    // Trigger @ 4 characters 
in FIFO
> #define UFCR_FIFO_TRIG8     (2 << 6)    // Trigger @ 8 characters 
in FIFO
> #define UFCR_FIFO_TRIG14    (3 << 6)    // Trigger @ 14 characters 
in FIFO
> 
> I will correct the header file and repost the example code.
> 
> -Bill
>