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Message

Re: TX FIFO

2004-08-02 by roger_lynx

Hello all,

I'd like to thank all who suggested their solution(s) to my post.
My error was that I was "enabling" THRE interrupt in U0IER reg. while
DLAB was set. 
The said interrupt can be turned ON when DLAB=0 *ONLY*.
<Duh>.
Now all my three ints (TIMER0, TIMER1, UART_THRE)run okay.

Thanks again.

--roger

--- In lpc2000@yahoogroups.com, Robert Adsett <subscriptions@a...> wrote:

> 
> >Page 89 looks (Oct 02, '03 specs) great, I have not study it until
> >today on a train.
> >I think FIFO/U0THR needs to be "primed", as you have hinted y'day.
> 
> As do most UART transmit interrupts (at least the ones I've dealt with).
> Given that only one interrupt is responding I'm wondering about your 
> interrupt acknowledgement.  Do you have an interrupt acknowledge
sequence 
> at the end of the interrupt response routines to inform the VIC that
you 
> have finished with the interrupt?
> 
>          ldr     r0, =VICVectAddrRead    /*  Let VIC know we are
done.   */
>          str     r0,[r0]
> 
> Without something like the above the VIC will never know you are
done with 
> the interrupt.

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