Lpc2000

--- In lpc2000@yahoogroups.com, "douglasbolton" <doug@c...> wrote:
> Is anybody else using the external bus to interface on the lpc2292. 
I 
> have 16 bit Sram and an 8 bit device connected to the external bus. 
> 
> Everything works fine except after a power on reset. I have to put 
a 
> delay in software of a few hundred milliseconds after setting up 
the 
> bus for the sram to work correctly.
> 
> If after power on I toggle the reset line it always works. All the 
> voltages are stable when the micro comes out of power on reset but 
it 
> won't access the sram correctly without a software delay.
> 
> I've tried extending the time the reset line is enabled during 
power 
> on to make sure all voltages are stable but it does not help.
> 
> Below is the code I'm using to set up the sram on CS1, I've put in 
> maximum waits but it doesn't help
> 
> dummy = PINSEL2;
> // set extended memory D0-D16 CS,CS1,CS2,CS3 A0-A19
> dummy &= ~(0x00000020);
> dummy |= 0x00000010;
> 	
> // enable /WE,/CS1
> dummy |= 0x00000900;
> 		
> // enable /CS2,/CS3
> dummy |= 0x00014000;
> 	
> // enable A0,A1, A2-A19
> dummy |= 0x0d800000;
> 					
> PINSEL2 = dummy;	
> 
> // set up the external sram on CS1
> dummy = BCFG1;	
> // maximum idle cycles
> dummy |= 0x0000000f;	
> 	
> // maximum wait cycles, 16 bit wide bus
> dummy |= 0x000007e0;	
> 
> // maximum wait cycles
> dummy |= 0x0000f800;	
> // 16 bit bus
> dummy &= ~(0x30000000);	
> dummy |= 0x10000000;					
> BCFG1 = dummy;


Found the problem, an  open track on the /oe pin of the sram pin. I 
was probing the /oe signal on an easier access point. It was causing 
enough wierd behaviour for me to chase my tail for 2 days