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Re: [lpc2100] Simple test program - is now instruction pipeline/VPB question

2003-11-22 by microbit

Hi Leon,
I'm "on the air" now too with LPC2106 !
Here is a prelim. current consumption figure I took :
I measure 6.5 mA @ 10 MHz setting and clearing P0.0 in a loop
(PLL default bypassed and 1 cclk / fetch) executing out of Flash.
Pretty impressive !
Trying to execute this as fast as possible has lifted up the veil a bit better on some of the instructions,
but there is still a mystery, so a question for people that are much more intimate with ARM7/LPC,
( I don't feel like asking an FAE that won't know an answer anyway and I can't find it in the
ARM7TDMI ref manual) :
I noticed it seems the VPB bus either causes inserted NOPs in the pipeline, or wait states are
automatically generated when I "write too fast" to the VPB bus.
Furthermore , I'm not even generating Read/Modify/Write instructions with my test C code !!!! ????
;
The 2nd question is, what if I write at a slower rate to VPB ?
Do I still need the fastest pclk for my I/O pins to update as fast as possible ?????
(I can't trace :-)
As an example, C code generating this sequence :
.......
STR R4,[R7,#0] P0.0 set to "1"
MOV R4,#1
STR R4,[R0,#0] ; P0.0 set to "0"
......
Takes :
1.6 uS (16 cclks) with pclk = 4 cclks
1.0 uS (10 cclks) with pclk = 2 cclks
0.8 uS (8 cclks) with pclk = 1 cclks
(that's what I measure here on HW)
Is there anyone that can shed some light on this ?
toggling P0.0 with pclk = cclk/4
-- Kris
www.microbit.com.au
----- Original Message -----
From: "Leon Heller" <leon_heller@...>
Sent: Saturday, November 22, 2003 9:49 PM
Subject: [lpc2100] Simple test program

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