Lpc2000

--- In lpc2000@yahoogroups.com, "Lasse Madsen" <lasse.madsen@e...> 
wrote:
> Hi All
> 
> I'm planning to try out the LPC2114 and I have a question about the
> bootloader and the state of the processors pins during this...
> 
> I have a multiplexer on UART 0 that can switch between a MAX232 for 
boot
> loading or another serial device.
> 
> Channel A = RX
> Channel B = TX
> 
> A+B Zero condition = serial device
> A+B High condition = MAX232 for boot loading
> 
> A and B select lines are coupled directly to 
> 
> A = Trace sync (P1.20)
> B = Trace PKT.3 (P1.19)
> 
> My philosophy is that when one holds the reset line low and drive 
P.14
> low (boot enable) the processor will enter the bootloader with all 
its
> pins set for tristate causing them to float except the Trace packet,
> Trace sync, Pipe Status, etc. pins which has an internal pull up ...
> 
> The internal pull up should then be able to drive the multiplexers 
A+B
> select lines high selecting the MAX232 chip for boot loading.  
> 
> According to the datasheet pins are tristated when reset is low but 
what
> are their state when entering the bootloader? I would assume they 
where
> all inputs? And that the internal pull ups would be enabled
> automatically? 
> 
> Any thoughts? 

I think your idea should work.

Karl Olsen