Lpc2000

>From: "dsidlauskas1" <dsidlauskas@...>
>Reply-To: lpc2000@yahoogroups.com
>To: lpc2000@yahoogroups.com
>Subject: [lpc2000] I/O Timing LPC2106
>Date: Tue, 14 Dec 2004 23:41:15 -0000
>
>
>
>I'm doing a simple port timing test using an IAR dev board and having
>trouble understanding what I'm seeing. My simple routine is:
>
>#define T 0x10
>
>int main (void)  {
>
>IODIR = 0xff0010;                             Outputs */
>VPBDIV = T;
>/*
>VPBDIV = T;
>VPBDIV = T;
>VPBDIV = T;
>VPBDIV = T;
>VPBDIV = T;
>   */
>
>while(1)
>{
>	IOSET = 0x0f0010;
>	IOCLR = 0x0f0010;
>}
>
>and I'm watching the port pin with a scope. The fastest I can get the
>pin to toggle is ~2.5Mhz with VPBDIV=0x01. With it equal to 0x00 or
>0x10 the toggle frequncy is the same, about 1.7Mhz. I'm running the
>clock at~60Mhz,
>and the peripheral buss at 60Mhz with VPDIV=0x01. Single stepping
>using the Keil simulator shows that I'm executing 9 instuctions for
>the loop. This should give me a toggle frequency of 60/9= 6.7Mhz.
>
>Also, if I set VPBDIV multiple times, as shown in the commented out
>code above, the toggle frequency decreases, all other things held the
>same.
>
>Other relavent register settings are:
>
>MAMCR = 0x01  MAM fully enabled
>MAMTIM = 0x03  3 flash fetch cycles
>
>PLLSTAT = 0x0744  PLL Enabled M=4 D=2
>
>The register values were read from the Keil simulator.
>
>Can anyone set me staight?

There was some discussion of this recently; there is a restriction of the 
I/O timings that is inherent in the ARM architecture.

Leon