Lpc2000

--- In lpc2000@yahoogroups.com, "philips_apps" <philips_apps@y...> 
wrote:
 
> the User's Manual has been posted in the file section (by John).

I did see that, hence my questions.  I didn't think that the August 
25 manual was the new manual.


> The 2132 and 2131 have an extra Flash area for the boot loader.
> 64k / 32k are all available to the user.

OK, thanks.


> SSP Fifo 16 messages (see UM), data length any value between 4-bit 
and
> 16-bit.

Thanks.  It seems like the SSP FIFO size isn't mentioned in the 
manual.



> Why not changed both SPI to SSP, legacy / compatibility. The old SPI
> let's you switch between master and slave mode on the fly, the SSP
> sort of does not. This feature is not typical in SPI usage but..  
some
> people might use / want it.

OK.

The POR isn't very well explained.  Can the chip boot correctly 
with /RESET tied to VDD, regardless of the VCC ramp?  And can the ISP 
erase/program functions be expected to work correctly as long as POR 
and BOD don't reset the processor? 

The datasheet says that Vbat min = 3.0V.  Can I expect it to work 
reliably with a 3V lithium battery?

In addition, are you planning to update the LPC2000 Flash Utility to 
support LPC213x?  I have some LPC2132 samples and will soon have to 
convert some LPC2114 projects to LPC2132.  And may I suggest an 
option to please get rid of the splash screen at startup?


Thanks,
Karl Olsen