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Lpc2000

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Re: [lpc2000] Erasing through JTAG?

2004-12-23 by Charles Manning

This would be a problem.

The fastest you can run the JTAG clock is one sixth the speed of the ARM core 
(this is part of the ARM Embedded ICE design).  If the PLL is not running 
then you can only run at 1/6th the speed of the crystal.

On Friday 24 December 2004 07:22, Dan Beadle wrote:
> I recently was working a similar problem with IAR JLink and Keil MPC2100
> board.
>
>
>
> I set IAR JLink clock parameter to 12 Mhz, debug Verify Flash ON.
>
>
>
> Often, I got "Target Inconsistency" errors on download, yet if I dump the
> data, it is correct.
>
>
>
>
>
> I eventually figured out that the PLL was still running at program time,
> making my clock 48Mhz.
>
> (My JTAG lets the CPU run for a while after reset.  The last target app
> runs for a while - long enough to set the PLL back up.)
>
>
>
> I set the IAR clock parameter to 48Mhz, and forced the JTAG speed to 1 MHz.
> Now everything is great.
>
>
>
> Is it possible that you are not reseting the chip on programming?
>
>   _____
>
> From: Leighton Rowe [mailto:leightonsrowe@...]
> Sent: Thursday, December 23, 2004 7:35 AM
> To: lpc2000@yahoogroups.com
> Subject: [lpc2000] Erasing through JTAG?
>
>
>
>
> I've recently been using the JTAG (along with IAR Software) to flash
> download code to my board for debugging. Everything works fine the
> first time I debug. However, if I made a code change and tried to
> flash & debug again I get data aborts. I usually have to do a hard
> Philips ISP erase before debugging again.
>
> Does the JTAG have any flash erasing capabilities?
>
>
>
>
>
>
>
>
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