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LPC2138 SSP port questions

2004-12-25 by beedward2

Hello all,

I want to connect an LPC2138 to a Cirrus Logic serial ADC, the
CS5451A.  This chip is a 6-channel, 16-bit  sigma-delta ADC that
samples all 6 channels simultaneously.  It acts as an SPI master, and
outputs all 6 words of data in one continuous 96-bit transmission. 
The ADC sends this burst every 256 microseconds.  Its clock stays low
when not transmitting, and the data is valid on the rising edge of the
clock.  The ADC also sends a 1-us pulse on a "frame start" pin just
before each 96-bit transmission.

I'd like to be able to use the LPC2138 SSP for this connection, since
I could set the frame size to 16 bits, then let the whole burst
accumulate in the buffer and configure an interrupt for "receive
timeout" (more than 32 bit times since the last data was received and
no other activity). However, I have some questions about the
configuration that the manual doesn't help me with.

1. Do I need the SSEL pin brought out if I have the SSP configured for
SPI mode, slave mode and slave output disabled?  It's unclear to me. 
I don't know what will happen if I try to use this pin for GPIO
when
in slave mode.

2. Does SSEL need to pulse for every frame in order for the port to
work with CPOL = 0 and CPHA = 0 in SPI mode?  Does the LPC213x really
need to see a pulse on SSEL to copy the data into the Rx buffer when
CPHA = 0?  If so, argggh!  I can work around it but it will require a
flip-flop or latch to delay the data by 1/2 SCK cycle (allowing me to
use CPHA = 1, which is clearly described as not needing the pulse.)

3. Is the time for the "receive timeout" calculated based on the clock
rate configured in SCR ?

Thanks, 
Ben Edwards

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