Lpc2000

Same result.  Still not working.  I get the Prefetch Abort Except.

When I trace it in the debugger I can see that it gets right to the 
call instruc:

   LDR    PC,[R5,#0]

And then it jumps to the Prefetch Abort Excep.

R5 is loaded with 0x40000000 which is the right RAM area, and the 
debugger says the IAP_Test() routine is at that location.  I can see 
the code is there as well in the debugger source.

Everything is right but the CPU is complaining about it's pipeline.  
Obviously executing code in flash ROM and then jumping to RAM is 
entirely different types of memory.  It's confusing the memory 
manager prefetch pipeline.

There must be something I am missing.  Something else is apparently 
necessary to tell the CPU the next instruc is in RAM. Otherwise the 
CPU instruc fetch fails.  Why?

Chris.