Lpc2000

At 04:51 PM 2/27/05 +0000, tsvetanusunov wrote:
> > That raises a question, I haven't seen answered.  How does the pin 
> toggling
> > speed compare between an LPC running at full speed (60 MHz, no slowdown on
> > the peripheral bus) and an SAM part at it's equivalent full speed?  The
> > only comparisons I've seen refer to pin toggling efficiency rather than
> > maximum rate.
>both devices run up to 60Mhz, so LPC @60Mhz toggles with 5Mhz, while
>SAM7 @60Mhz toggles with 10Mhz.

Thanks

<snip>
> > Perhaps.  It would depend on how closely the memory activity in the
> > benchmark matched that in the application.  And whether it used optimized
> > assembler or standard library code or a simple C routine or.....
>
>indeed, but it will be same code on different hardware platforms, so
>the better hardware will handle better same code (I guess)

You are more optimistic about that than I.  At least at the level of 
differences the tests are likely to bring out.  I don't really expect the 
tests to be any more meaningful than comparing clock rates, especially 
since we are talking about the same core.  The basic problems are the 
definition of better and combining low level narrow benchmarks to produce 
any sort of guide to higher level combined performance (there is no 
guarantee that they correlate).

For instance, while I would expect a single PID measurement would scale to 
the use of PIDs in an application I wouldn't assume that measuring 
multiplication and addition would allow me to estimate the performance of a 
PID.

Robert

" 'Freedom' has no meaning of itself.  There are always restrictions,
be they legal, genetic, or physical.  If you don't believe me, try to
chew a radio signal. "

                         Kelvin Throop, III