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Re: [lpc2000] Re: IAR C and FIQ isr

2005-05-13 by 42Bastian Schick

Robert

> One of my most annoying support issues was not with a compiler vendor but
> an RTOS vendor.  I was developing on a chip that had a lot of errata and
> partly as a result of that I was using a low optimization level on the
> compiler.  I spent some time (weeks) trying to track down a bug that 
> would
> appear and disappear with little apparent rhyme or reason.  It appeared
> that the context was getting corrupted and naturally interrupts were a
> prime suspect.  I finally tracked it down to an operation in the RTOS 
> that
> was supposed to be atomic but took two store operations.  Interestingly
> enough the operation was atomic when the optimizer was turned up since 
> the
> compiler generated a sequence that effectively disabled interrupts during
> the two stores.  With the optimizer was turned down the operation was
> broken into a slightly longer non-atomic sequence.  Being a good 
> customer I
> reported the oversight of not protecting this operation in order to 
> ensure
> it was atomic.  The response?  It wasn't considered a bug since it didn't
> occur at the higher optimization levels!

May I cite you when discussing with customers about the pro's of an 
assembly
written RTOS :-)


-- 
42Bastian Schick

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