----- Original Message ----- From: Richard Duits To: lpc2000@yahoogroups.com Sent: Thursday, August 18, 2005 1:15 AM Subject: Re: [lpc2000] RAM loading via JTAG When you switch the ARM7 into debug mode, all instructions and data are read from the jtag interface. You can just upload a ldm instruction for example with the data following the instruction and then use a stm instruction to store it in sram. ** Do you mean: should I send via JTAG binary code of LDM/STM instructions? Then you setup the registers to call the IAP routine and set a breakpoint to the same address the LR is pointing to. The ARM site has excelent documentation on this, so I suggest you browse www.arm.com and lookup the information you need. ** OK, I'll try. A suggestion: use a FT2232 (see http://www.ftdichip.com/FTProducts.htm#FT2232C) for the low level JTAG stuff, they have a JTAG DLL for windows and good documentation the write this yourself for other platforms. All you need is this single FT2232 and some passive components to make this work. ** JTAG is not a problem for me (I used FT2232 in universal PLD programmer/configurator IEEE1532 compatible). My idea is to prepare Windows software for simple Macraigor interface for fast programming LPC uCs. Thanks for answer. Piotr [Non-text portions of this message have been removed]
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Re: [lpc2000] RAM loading via JTAG
2005-08-18 by Piotr Zbysinski - EP(H)
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