Lpc2000

> Hey guys, I've started working with the LPC2138. I'm still working 
> through the docs, but one question I have is this:
> 
> PLLCFG  = (4 + (2 << 5));
>    E3A0320E   mov r3, #0xE0000000
>    E283397F   add r3, r3, #0x001FC000
>    E2833084   add r3, r3, #0x00000084
>    E3A02044   mov r2, #0x00000044
>    E5C32000   strb r2, [r3]
> 
> I'm using CrossWorks with a Olimex JTAG (works great so far BTW) with 
> optimization turned off.
> 
> ARM assembly still isn't clear to me yet, so this is probably buried in 
> the technical docs somewhere.
> 
> Why doesn't this compile to something like:
> 
> mov r3, #0xE01FC084
> mov r2, #0x00000044
> strb r2, [r3]
> 
> Can't the ARM load a 32 bit immediate?

The opcode is 32-bits, so it can't also contain a 32-bit immediate.
But in this case, your number is only 8-bits, so it could probably
code an op-code for it.

The way I answer this type of question is to write C-code and
build it as you have done, and then recode what I think should
be possible in assembler and see if that builds. In the case
of 

 mov r3, #44

it'd probably compile, but

 mov r3, #12345678

it probably would not, but 

 mov r3, PLLVAL
 PLLVAL: .word #12345678

would (or whatever the assembler syntax is :), since this 
is loading a value using indirect addressing.

Dave