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Re: LPC2136 UART1 Hardware Flow Control

2005-09-08 by lpcarmed

Please take a look at UT050418A.zip (thanks Bill!) in the files
section, it has a pretty well worked out ISR driven UART I/O. You can
build your handshake over that if needed.

--- In lpc2000@yahoogroups.com, "uedogan" <uedogan@g...> wrote:
> Hi Experts,
> 
> i'm currently designing a new project based on the LPC2136. Its my 
> first ARM project (and someone gives me not much time...). I am 
> coming from AVR and 8051 types. In such projects i always implemented 
> RTS/CTS hardware flow control simply by checking the CTS state before 
> sending the next characters (there where no FIFOs). 
> 
> Now, at first, i thought - nice, use UART1 and everything works 
> automatically! But the more i read through the manual the more i come 
> to a point where i believe that this still has to be done by software 
> (e.g. evaluating an interrupt for the modem status lines, i believe 
> it is DELAT-CTS). At the same time the errata sheet states that this 
> would not be a good idea when also another interrupt is needed (e.g. 
> for the sending).
> 
> Another problem is that i never used so called '550 industry 
> standard' devices. That means that this UART1 is completely new for 
> me.
> 
> I must tell that my protocoll does NOT allow simultanously sending 
> and receiving of data. Maybe this is helpfull! So i need interrupts 
> when sending is ready. I mean, data was completely shifted out, not 
> only that the FIFO is empty. But again, the errata sheet states that 
> there might also be problems when using the THRE interrupt (by the 
> way, is that the right ones for me??). For performance reasons i want 
> to use the FIFOs if possible. If not i have to do everything the same 
> way as all the years before....
> 
> Can anyone help me????
> 
> Thanks,
> Ünal

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