Lpc2000

--- In lpc2100@yahoogroups.com, "J.C. Wren" <jcwren@j...> wrote:
>     I notice the IAR eval board has a couple of '244 buffers.  What 
> exactly does the header on their board connect to?  An intermediate 
> device, or the parallel port directly?  (And talk about a miserable 
> website.  All those frames and garbage.  They need to hire a website 
> designer).
> 
>     The LPC210x documentation talks about the RTCK pin.  This is 
> silkscreened on the IAR board, but is not present on the Wiggler 
> interface.  The designs in the Files section of the group all seem to 
> leave it unconnected.  Is there any way to pin this so that if you have 
> a "real" ICE, the 10x2 connector has the proper pinout?  Same for 
> DBGSEL.  Looks like the IAR board allows the JTAG interface to
decide to 
> bring the board up in debug mode, or just assert /RST to it.
> 
>     Is the a formal spec anywhere for the 10x2 JTAG connector?

The LPC210x User Manual has a description. RTCK is only used for the
ARM Multi-ICE, apparently.

> 
>     My plan is to put a DB-25 and 74LVC244A on the board.  There are
two 
> jumpers, one to each /ENABLE on each half of the '244.  By moving the 
> jumper, you'll be able to steer the JTAG interface to the primary or 
> secondary (I make this a slide switch, since to use the secondary port, 
> you have to bring the part up in primary mode first).  I'm also putting 
> two 10x2 headers on the board, one plumbed to the primary JTAG 
> interface, the other to the secondary.  It's for this reason I'd
like to 
> get the RTCK and DBGSEL correct.


Leon