Lpc2000

Great!!! Thanks for the pinout.

If no manual exists yet, can we get some info on DEBUG pin? Is this 
used to enable JTAG or to enter boot loader? is P0.14 still used to 
enter boot loader?

Also, can TRST pin be used as I/O while other JTAG pins are running 
JTAG? Am I crazy to ask this? :-)

Gus
--- In lpc2000@yahoogroups.com, "philips_apps" <philips_apps@y...> 
wrote:
>
> Hello Gus,
> 
> the Users Manual will be available with the samples in November. 
The 
> PLCC-44 pinout turned out to be a less restricted than previously 
> assumed.  I will post it as a jpg-file in the files section today.
> 
> We combined the pins VBAT and V18 and made it just a V18. This 
limits 
> the ability to buffer the RealTimeClock with a battery but if the 
> device is in power down mode with V18 applied, the RTC will keep 
> running and the RAM contents remains. Current in power down is 
> expected typically in the 10 uAs range.
> 
> Given the specified power consumption of the I/O pins, we decided 
to 
> eliminate one Vdd3 that was pin 17 on the TQFP-48 package. As a 
> result, high levels of pins 18 through 28 of the PLCC package 
might be 
> 0.1V lower than those on the side of pin 1.  All are well within 
> specified levels.
> 
> Given the input from this Forum and checking with our partners 
> providing debuggers, one JTAG signal, the return clock was 
sacrificed.
> The RTCK is most important if JTAG needs to adapt to changing 
clock 
> speeds. Our recommendation is to use a JTAG clock of 1 MHz which 
> covers all speeds from 10 MHz to 70 MHz CPU.
> 
> Last but not least the only "funtional pin" we had to eliminate 
was 
> the AIN7, pin 39 on the TQFP-48.
> 
> Hope this will not upset too many people and provide maximum 
> functionality for most of us.
> 
> Regards, Robert 
> 
> --- In lpc2000@yahoogroups.com, "Gus" <gus_is_working@y...> wrote:
> >
> > Any updates on the manual of LPC2103?
> > Any info on the pinout of LPC2103 PLCC44?
> > If not, when will this data be available?
> > 
> > Thanks,
> > 
> > Gus
> >
>