--- In lpc2000@yahoogroups.com, "FreeRTOS Info" <nospam@F...> wrote: > > > I wonder... what does this instruction aim for?: > > > > asm volatile ( "LDR LR, [LR, #+60]" ); > > > > What is LR+60 pointing to? Why 60? Why not 56 or 64? > > The stack frame is always the same, and this is the offset to the return > address once the context has been restored. > > Regards, > Richard. > > > http://www.FreeRTOS.org > Oh, I see... 60 = 15 (registers) x 4 (bytes per register). Thanks, Richard.
Message
Re: FREERTOS problem on gcc and LPC2138
2005-10-22 by Guillermo Prandi