Lpc2000

I'm trying to calculate how many MIPS I could get out of a LPC2210 
running at highest possible frequency using external burst mode flash 
memory. 
Somehow, I'm a bit disappointed at the moment.

1° On page 31 of the LPC2210 2220 User Manual is stated that the 
length of of a read access (except for subsequent reads from a burst 
ROM), in CCLK cycles, is the number of waitstates + 3. If I'm correct 
this means that even with 0 waitstate memory I need 3 clockcycles to 
read a word out of memory? The timing diagram on P35 confirms this 
behavior.

2° We are using burst mode with a 25ns page read time. In order to 
use burstmode, the manual tells me that Taccburst <= Tcyc - 20ns.
This means that Tcyc >= (25+20)ns or CCLK <= 22.22MHz .
The burst has a max. length of 4 reads, so we have 1 initial read 
followed by 3 fast reads.
Our Initial read needs 1 waitstate (90nS) and takes 4 clockcycles.
The succeeding 3 reads only take 1 clockcycle.
As a result, I got 4 reads for 7 clockcycles or 12.57 MIPS @ 22MHz.

Any flaws in this calculation?

Thanks for the feedback,

Patrick Smout