SRAM write-back buffer
2004-03-02 by winbond2
The LPC2106 user guide (2003 Oct 02 Page 17) describes the operation of the write-back buffer, but does not say what happens if the CPU writes a byte and then tries to read the same address without an additional write. Is the value returned by the read first written and then read back, or is the value read from the write-back buffer ? Thanks in Advance Joseph The exact wording is The SRAM controller incorporates a write-back buffer in order to prevent CPU stalls during back-to-back writes. The write-back buffer always holds the last data sent by software to the SRAM. This data is only written to the SRAM when another write is requested by software. If a chip reset occurs, actual SRAM contents will not reflect the most recent write request. Any software that checks SRAM contents after reset must take this into account. A dummy write to an unused location may be appended to any operation in order to guarantee that all data has really been written into the SRAM.