Lpc2000

Hi Dominic and Robert,

John Heenan started this "JTAG and debugging are the same on LPC" argument 
to defend his false claim:

>Date: Thu, 02 Feb 2006 21:46:07 -0000
>From: "John Heenan" <l10@...>
>Subject: Re: LPC Internals Question
>
>[insults deleted]
>
>According to the boot process flowchart 'Debug' is not enabled after
>reset until confirmation it can be enabled. So guess what, you cannot
>fiddle with the JTAG lines on reset to grab control before the boot
>loader. The boot loader is needed to enable JTAG and it won't enable
>JTAG if the bootloader cannot run.

It is quite clear from the above statement that John does not understand 
how debugging through JTAG interface is implemented on the LPCs.

John is going by the boot process flow chart that is misleading (as it did 
to John) that somehow JTAG port (and hence debugging capability) is enabled 
only if the boot loader runs and enables it after checking CRP location in 
flash sector 0.

More specifically, John does not understand that if you pull a particular 
GPIO pin low during reset, the JTAG (debugging) port is *enabled* as the 
CPU comes out of reset.  This happens well before the CPU executes the very 
first instruction.

Jaya

--- In lpc2000@yahoogroups.com, Dominic Rath <Dominic.Rath@...> wrote:
 >
 > On Thursday 09 March 2006 01:29, Robert Wood wrote:
 > >  >> >JTAG and debug are NOT the same. For those who are educated the
 > >  >>
 > >  >> meaning of the word debug is made clear by the context. In the
 > >  >> context of CRP, debug clearly means enabling the debug bus signal to
 > >  >> act, which JTAG, if enabled, may be attempting to assert. Lack of
 > >  >> real educated insight is giving rise to confusion that should not
 > >  >> exist and I should not be expected to clarify, particularly to those
 > >  >> who claim or imply expertise. Clearly debug can also mean JTAG, but
 > >  >> in a different context.
 > >
 > > As far as Philips LPC2xxx chips are concerned, debug and JTAG _are_ the
 > > same.
 > > There's no boundary scan implemented on the LPCs, only the debug scan
 > > chains
 > > that are part of the ARM7TDMI-S core. When CRP is enabled, JTAG/Debug
 > > doesn't
 > > work. <<
 > >
 > > Actually, for once, I can see John's reasoning. The way I understand it.
 > > the JTAG is just the interface, which happens to carry the signals from
 > > the debug unit. It could be called the Philanium Doggle Whack interface
 > > and have a 1,000 bit wide interface, but still be carrying the same
 > > debug information. It's possibly like calling TCP/IP Ethernet. Just
 > > because Ethernet normally carries TCP/IP doesn't mean it always is.
 >
 > Yeah, but I don't think that's what he means, when he insists on telling 
that
 > "In the context of CRP, debug clearly means enabling the debug bus 
signal to
 > act", which is simply not the way LPCs work. This whole thread and its
 > predecessors are about CRP. I've tried to explain to him that CRP works by
 > having the JTAG/Debug pins operate either as a GPIO pins or as JTAG 
pins, but
 > obviously he doesn't care, and is only interested in bashing people.
 >
 > Actually, Philips themself call the pins "Debug" port. For example in the
 > LPC2119, 2129, 2194, 2292 and 2294 user manual on page 120, they 
describe pin
 > P1.26 (RTCK): "LOW on this pin while RESET is LOW enables pins P1.31:26 to
 > operate as a Debug port after reset."
 >
 > Regarding lpc2100_fan's desire to keep his name out of this: Sure, 
lately this
 > is all John Heenan's objections, so lets call it that way.
 >
 > Kind regards,
 >
 > Dominic




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