Lpc2000

Hello,
I am trying to understand installing exception handlers from C (Ref: 
ARM developer guide, sec 5.3.2). 
Could anyone please elaborate the step wherein "subtract 8 to allow 
prefetching " is done?

Thanks
Nikhil

--- In lpc2000@yahoogroups.com, "ndhegde" <ndhegde@...> wrote:
>
> Hello,
> I am trying to understand installing exception handlers from C (Ref: 
> ARM developer guide, sec 5.3.2). 
> Could anyone please elaborate the step wherein "subtract 8 to allow 
> prefetching " is done?
> 
> Thanks
> Nikhil
>

When your instruction at address A is being processed, the next
instruction at address A+4 is already fetched so the PC is pointing to
A+8.
So if your instruction involves PC manipulation you have to take in
account of this.

--- In lpc2000@yahoogroups.com, "ndhegde" <ndhegde@...> wrote:
>
> Hello,
> I am trying to understand installing exception handlers from C (Ref: 
> ARM developer guide, sec 5.3.2). 
> Could anyone please elaborate the step wherein "subtract 8 to allow 
> prefetching " is done?
> 
> Thanks
> Nikhil

The EAXXXXXX instruction is encoded with 24-bit (word) offset that is
added to the current of PC at the time this instruction is executed.

By the time the EAXXXXXX instruction is executed, because instructions
are prefetched in a pipelined architecture, the current PC would have
been incremented by eight, which corresponds to two instructions that
are fetched into the pipeline.

When you are encoding the EAXXXXXX instruction with the offset, you
must subtract eight to take into account of this increment by eight.