Lpc2000

I just read through the users manual for the LPC2114 and from what i 
can deduce the ETM output can be individually disabled simply by not 
tying a pull up resisitor to P1.20/TRACESYNC. I.e. you should be able 
to use the ETM port pins as normal IO pins while debugging through 
the JTAG interface. Did i understand this correctly or have i jumped 
to conclusions ?

/Pontus

Pontus,

on the LPC2114 and all 64-pin LPC2000 devices that I know, you can
pick either JTAG or ETM+JTAG so you got it right. On the LPC210x
(48-pin devices) this is a little more tricky. Enabling  debug does
enable JTAG + ETM, that's why there were many questions about the
secondary JTAG on the LPC210x. There is no such thing as a secondary
JTAG (documented?) on the LPC2114.

Cheers, Bob

--- In lpc2000@yahoogroups.com, pontus.oldberg@i... wrote:

> I just read through the users manual for the LPC2114 and from what i 
> can deduce the ETM output can be individually disabled simply by not 
> tying a pull up resisitor to P1.20/TRACESYNC. I.e. you should be able 
> to use the ETM port pins as normal IO pins while debugging through 
> the JTAG interface. Did i understand this correctly or have i jumped 
> to conclusions ?
> 
> /Pontus

If P1.20/TRACESYNC is LOW coming out of RESET, the
ETM will be ENABLED.  Leaving P1.20/TRACESYNC OPEN or
or having a PULL-UP on it coming out of RESET will
DISABLE the ETM.  

Regards
-Bill Knight
the ARM Patch



On Sat, 24 Apr 2004 11:31:09 -0000, pontus.oldberg@... wrote:

I just read through the users manual for the LPC2114 and from what i 
can deduce the ETM output can be individually disabled simply by not 
tying a pull up resisitor to P1.20/TRACESYNC. I.e. you should be able 
to use the ETM port pins as normal IO pins while debugging through 
the JTAG interface. Did i understand this correctly or have i jumped 
to conclusions ?

/Pontus





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