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VIC Programming Model

VIC Programming Model

2004-05-10 by James Dabbs

On Page 70 of my LPC210X User's Manual..

"Although multiple sources can be selected (VICIntSelect) to generate
FIQ request, only one interrupt service routine should be dedicated to
service all available/present FIQ request(s). Therefore, if more than
one interrupt sources are classified as FIQ the FIQ interrupt service
routine must read VICFIQStatus to decide based on this content what to
do and how to process the interrupt request.  However, it is recommended
that only one interrupt source should be classified as FIQ. Classifying
more than one interrupt sources as FIQ will increase the interrupt
latency."

I don't understand why I need to look at VICFIQStatus.  Can't I just put
a "mov pc,[pc,#-0xfec]" at address 0x1c? As long as my IRQ and FIQ
interrupt service routines know what to do, it seems like this should
work without having to go further to determine the source of the
interrupt.  In fact, in non-preemptive designs, I don't know why you
wouldn't make everything FIQ.

What am I missing?

Thanks,

James Dabbs, TGA

Re: [lpc2000] VIC Programming Model

2004-05-10 by Robert Adsett

At 01:34 PM 5/10/04 -0400, you wrote:
>I don't understand why I need to look at VICFIQStatus.  Can't I just put a 
>"mov pc,[pc,#-0xfec]" at address 0x1c? As long as my IRQ and FIQ interrupt 
>service routines know what to do, it seems like this should work without 
>having to go further to determine the source of the interrupt.

The  VICVectAddr register only gives the address of the highest priority 
IRQ, not the FIQ.

>In fact, in non-preemptive designs, I don't know why you wouldn't make 
>everything FIQ.

Well, you lose the benefits of the semi-vectoring you get with the 
IRQ.  Also the assumption of the FIQ is that you have one (or a few) 
interrupt(s) that you want to preempt the others on a high priority, low 
latency basis.  So the FIQ gets a higher priority response and several more 
shadow registers.

Robert

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