Yahoo Groups archive

Lpc2000

Index last updated: 2026-04-28 23:31 UTC

Thread

Interrupts trouble...

Interrupts trouble...

2004-08-11 by nourson54

Hi,

I'm trying to play with interrupts with Crossworks but I can't get it
working , even with the samples code (timer0 interrupt) .
I debug with Olimex JTAG .
I put a breakpoint on my interrupt ISR but it never breaks on it 
but in the startup code :

"/*****************************************************
 *                                                                   
        *
 * Default exception handlers                                        
        *
 * These are declared weak symbols so they can be redefined in user
code.     * 
 *                                                                   
        *
 *****************************************************/

undef_handler:
  b undef_handler
  
swi_handler:
  b swi_handler
  
pabort_handler:
  b pabort_handler
  
dabort_handler:
  b dabort_handler
  
irq_handler:
  b irq_handler      <-----------------------  BREAKS HERE 
  
fiq_handler:
  b fiq_handler

  .weak undef_handler, swi_handler, pabort_handler, dabort_handler,
irq_handler, fiq_handler



Could someone help me ? 

thx

Yann


PS: I'm a newbie in ARM world ;-) So excuse me if it seems a trivial
question :-P

Re: Interrupts trouble...

2004-08-11 by Randy Ott

Yann,

Unless you supply an irq_handler, the default weak symbol will be 
linked and the interrupt will branch to an infinite loop.  I use a 
handler in C that looks like this:
==================================
__irq __arm void irq_handler(void)
{
  void (*interrupt_function)();
  unsigned int vector;

  vector = VICVectAddr;   // Get interrupt vector.
  interrupt_function = (void(*)())vector;
  (*interrupt_function)();  // Call vectored interrupt function.

  VICVectAddr = 0;        // Clear interrupt in VIC.
}
==================================
I don't know how the __irq and __arm attributes are declared in 
Crossworks.  If it is GNU then I believe you need to change the 
function declaration to:

irq_handler(void) __attribute__ ((interrupt ("IRQ")))

Hope this helps.

Randy Ott



--- In lpc2000@yahoogroups.com, "nourson54" <yannsuisini@h...> wrote:
> Hi,
> 
> I'm trying to play with interrupts with Crossworks but I can't get 
it
> working , even with the samples code (timer0 interrupt) .
> I debug with Olimex JTAG .
> I put a breakpoint on my interrupt ISR but it never breaks on it 
> but in the startup code :
> 
> "/*****************************************************
>  
*                                                                   
>         *
>  * Default exception 
handlers                                        
>         *
>  * These are declared weak symbols so they can be redefined in user
> code.     * 
>  
*                                                                   
>         *
>  *****************************************************/
> 
> undef_handler:
>   b undef_handler
>   
> swi_handler:
>   b swi_handler
>   
> pabort_handler:
>   b pabort_handler
>   
> dabort_handler:
>   b dabort_handler
>   
> irq_handler:
>   b irq_handler      <-----------------------  BREAKS HERE 
>   
> fiq_handler:
>   b fiq_handler
> 
>   .weak undef_handler, swi_handler, pabort_handler, dabort_handler,
> irq_handler, fiq_handler
> 
> 
> 
> Could someone help me ? 
> 
> thx
> 
> Yann
> 
> 
> PS: I'm a newbie in ARM world ;-) So excuse me if it seems a 
trivial
> question :-P

Re: Interrupts trouble...

2004-08-11 by nourson54

After some research in other samples I found a tip :

I have to change a line in the default startup.s :


--------------------------------------------------------------------
  .section .vectors, "ax"
  .code 32
  .align 0

/*****************************************************************************
 * Exception Vectors                                                 
       *
 *****************************************************************************/
_vectors:
  ldr pc, [pc, #reset_handler_address - . - 8] /* reset */
  ldr pc, [pc, #undef_handler_address - . - 8] /* undefined instruction */
  ldr pc, [pc, #swi_handler_address - . - 8] /* swi handler */
  ldr pc, [pc, #pabort_handler_address - . - 8] /* abort prefetch */
  ldr pc, [pc, #dabort_handler_address - . - 8] /* abort data */
  .word 0xB9205F84 /* boot loader checksum */

  ldr pc, [pc, #irq_handler_address - . - 8] ----------->  TO LDR PC,
[PC, #-0xFF0]

  ldr pc, [pc, #fiq_handler_address - . - 8]

------------------------------------------------------------------

I don't understand the mean of this modificication but it works ? 
Why #-0xFF0 ? 
What's that syntax : _ . - 8 ?

thanks in advance !




--- In lpc2000@yahoogroups.com, "Randy Ott" <randy@t...> wrote:
Show quoted textHide quoted text
> Yann,
> 
> Unless you supply an irq_handler, the default weak symbol will be 
> linked and the interrupt will branch to an infinite loop.  I use a 
> handler in C that looks like this:
> ==================================
> __irq __arm void irq_handler(void)
> {
>   void (*interrupt_function)();
>   unsigned int vector;
> 
>   vector = VICVectAddr;   // Get interrupt vector.
>   interrupt_function = (void(*)())vector;
>   (*interrupt_function)();  // Call vectored interrupt function.
> 
>   VICVectAddr = 0;        // Clear interrupt in VIC.
> }
> ==================================
> I don't know how the __irq and __arm attributes are declared in 
> Crossworks.  If it is GNU then I believe you need to change the 
> function declaration to:
> 
> irq_handler(void) __attribute__ ((interrupt ("IRQ")))
> 
> Hope this helps.
> 
> Randy Ott
> 
> 
> 
> --- In lpc2000@yahoogroups.com, "nourson54" <yannsuisini@h...> wrote:
> > Hi,
> > 
> > I'm trying to play with interrupts with Crossworks but I can't get 
> it
> > working , even with the samples code (timer0 interrupt) .
> > I debug with Olimex JTAG .
> > I put a breakpoint on my interrupt ISR but it never breaks on it 
> > but in the startup code :
> > 
> > "/*****************************************************
> >  
> *                                                                   
> >         *
> >  * Default exception 
> handlers                                        
> >         *
> >  * These are declared weak symbols so they can be redefined in user
> > code.     * 
> >  
> *                                                                   
> >         *
> >  *****************************************************/
> > 
> > undef_handler:
> >   b undef_handler
> >   
> > swi_handler:
> >   b swi_handler
> >   
> > pabort_handler:
> >   b pabort_handler
> >   
> > dabort_handler:
> >   b dabort_handler
> >   
> > irq_handler:
> >   b irq_handler      <-----------------------  BREAKS HERE 
> >   
> > fiq_handler:
> >   b fiq_handler
> > 
> >   .weak undef_handler, swi_handler, pabort_handler, dabort_handler,
> > irq_handler, fiq_handler
> > 
> > 
> > 
> > Could someone help me ? 
> > 
> > thx
> > 
> > Yann
> > 
> > 
> > PS: I'm a newbie in ARM world ;-) So excuse me if it seems a 
> trivial
> > question :-P

Re: [lpc2000] Re: Interrupts trouble...

2004-08-11 by Robert Adsett

At 02:50 PM 8/11/04 +0000, you wrote:

>   ldr pc, [pc, #irq_handler_address - . - 8] ----------->  TO LDR PC,
>[PC, #-0xFF0]
>
>------------------------------------------------------------------
>
>I don't understand the mean of this modificication but it works ?
>Why #-0xFF0 ?
>What's that syntax : _ . - 8 ?

ldr     pc, [pc, #-0xFF0]

loads the program counter with the values read from the location of (PC - 
0xff0).  Essentially an indirect jump.  That location (PC - 0xff0) is the 
address of the VIC register that holds the vector for the interrupt that is 
currently the highest priority IRQ.

Robert

" 'Freedom' has no meaning of itself.  There are always restrictions,
be they legal, genetic, or physical.  If you don't believe me, try to
chew a radio signal. "

                         Kelvin Throop, III

Re: [lpc2000] Re: Interrupts trouble...

2004-08-11 by Robert Adsett

At 11:02 AM 8/11/04 -0400, you wrote:

>ldr     pc, [pc, #-0xFF0]
>
>loads the program counter with the values read from the location of (PC -
>0xff0).  Essentially an indirect jump.  That location (PC - 0xff0) is the
>address of the VIC register that holds the vector for the interrupt that is
>currently the highest priority IRQ.

Oh, and don't forget that the VIC's vector register must be written to to 
signal the VIC that the end of the interrupt has been reached.  Otherwise 
the VIC will remain stuck on that interrupt.

That will be in the examples here and in the newlib lpc support.

Robert

" 'Freedom' has no meaning of itself.  There are always restrictions,
be they legal, genetic, or physical.  If you don't believe me, try to
chew a radio signal. "

                         Kelvin Throop, III

Move to quarantaine

This moves the raw source file on disk only. The archive index is not changed automatically, so you still need to run a manual refresh afterward.