problem with interrupts
2004-10-10 by dasbento@aeiou.pt
Hello,
anyone knows if the interruptions work when compiling a program in the
gnuarm (gcc 3.4.1)with the files following (boot.s and lpc2106-rom.ld).
The steps of compiling are:
arm-elf-gcc -Tlpc2106-rom.ld -nostartfiles
Wl,-Map=led.map,--cref,-nostdlib -s -o led boot.s uart.c led.c
arm-elf-objcopy --output-target ihex led led.hex
arm-elf-objcopy --output-target binary led led.bin
Thanks
Domingos
****************************************************************
file boot.s
*****************************************************************
/* Sample initialization file */
.extern main
.extern exit
/* .text is used instead of .section .text so it works with arm-aout
too. */
.text
.code 32
.align 0
.extern __bss_beg__
.extern __bss_end__
.extern __stack_end__
.extern __data_beg__
.extern __data_end__
.extern __data+beg_src__
.global start
/* .global _mainCRTStartup */
/* .global _start */
.global endless_loop
start:
_start:
_mainCRTStartup:
/* Start by setting up a stack */
/* Set up the stack pointer to end of bss */
ldr r3, .LC6
mov sp, r3
sub sl, sp, #512 /* Still assumes 512 bytes
below sl */
mov a2, #0 /* Second arg: fill value */
mov fp, a2 /* Null frame pointer */
mov r7, a2 /* Null frame pointer for
Thumb */
/* ldr r1, #__bss_beg__*/ /* First arg: start of
memory block */
ldr r1, .LC1 /* First arg: start of
memory block */
/* ldr r3, #__bss_end__*/ /* Second arg: end of memory
block */
ldr r3, .LC2 /* Second arg: end of
memory block */
subs r3, r3, r1 /* Third arg: length of
block */
beq .end_clear_loop
mov r2, #0
.clear_loop:
strb r2, [r1], #1
subs r3, r3, #1
bgt .clear_loop
.end_clear_loop:
ldr r1, .LC3 /* First arg: start
of memory block */
ldr r2, .LC4 /* Second arg: end of memory
block */
ldr r3, .LC5
subs r3, r3, r1 /* Third arg: length of block */
beq .end_set_loop
.set_loop:
ldrb r4, [r2], #1
strb r4, [r1], #1
subs r3, r3, #1
bgt .set_loop
.end_set_loop:
mov r0, #0 /* no arguments */
mov r1, #0 /* no argv either */
bl main
endless_loop:
b endless_loop
/*
bl exit Should not return
*/
/* For Thumb, constants must be after the code since only
positive offsets are supported for PC relative addresses. */
.align 0
.LC1:
.word __bss_beg__
.LC2:
.word __bss_end__
.LC3:
.word __data_beg__
.LC4:
.word __data_beg_src__
.LC5:
.word __data_end__
.LC6:
.word __stack_end__
.section .startup,"ax"
.code 32
.align 0
b start
b undefined_instruction_exception
b software_interrupt_exception
b prefetch_abort_exception
b data_abort_exception
b reserved_exception
b interrupt_exception
b fast_interrupt_exception
*****************************************************************
file lpc2106-rom.ld (i altered the size of memory for LPC2129)
******************************************************************
/*
SEARCH_DIR( /home/radsett/install/arm-elf/lib)
SEARCH_DIR( /home/radsett/install/lib/gcc-lib/arm-elf/3.3.2)
*/
MEMORY {
flash : ORIGIN = 0, LENGTH = 246K
ram : ORIGIN = 0x40000000, LENGTH = 16K
}
__stack_end__ = 0x40000000 + 16K - 4;
SECTIONS {
. = 0;
startup : { *(.startup)} >flash
prog : {
*(.text)
*(.rodata)
*(.rodata*)
*(.glue_7)
*(.glue_7t)
} >flash
__end_of_text__ = .;
.data : {
__data_beg__ = .;
__data_beg_src__ = __end_of_text__;
*(.data)
__data_end__ = .;
} >ram AT>flash
.bss : {
__bss_beg__ = .;
*(.bss)
} >ram
/* Align here to ensure that the .bss section occupies space up to
_end. Align after .bss to ensure correct alignment even if the
.bss section disappears because there are no input sections. */
. = ALIGN(32 / 8);
}
. = ALIGN(32 / 8);
_end = .;
_bss_end__ = . ; __bss_end__ = . ; __end__ = . ;
PROVIDE (end = .);
/*
INPUT( -lc -lgcc)
*/
PROVIDE( undefined_instruction_exception = endless_loop);
PROVIDE( software_interrupt_exception = endless_loop);
PROVIDE( prefetch_abort_exception = endless_loop);
PROVIDE( data_abort_exception = endless_loop);
PROVIDE( reserved_exception = endless_loop);
PROVIDE( interrupt_exception = endless_loop);
PROVIDE( fast_interrupt_exception = endless_loop);
PROVIDE( PINSEL0 = 0xE002C000);
PROVIDE( IODIR = 0xE0028008);
PROVIDE( IOCLR = 0xE002800C);
PROVIDE( IOSET = 0xE0028004);
/* UART 0 */
PROVIDE( U0RBR = 0xE000C000);
PROVIDE( U0THR = 0xE000C000);
PROVIDE( U0IER = 0xE000C004);
PROVIDE( U0IIR = 0xE000C008);
PROVIDE( U0FCR = 0xE000C008);
PROVIDE( U0LCR = 0xE000C00C);
PROVIDE( U0LSR = 0xE000C014);
PROVIDE( U0SCR = 0xE000C01C);
PROVIDE( U0DLL = 0xE000C000);
PROVIDE( U0DLM = 0xE000C004);
/* PLL */
PROVIDE( PLLCON = 0xE01FC080);
PROVIDE( PLLCFG = 0xE01FC084);
PROVIDE( PLLSTAT = 0xE01FC088);
PROVIDE( PLLFEED = 0xE01FC08C);
/* MAM */
PROVIDE( MAMCR = 0xE01FC000);
PROVIDE( MAMTIM = 0xE01FC004);
/* VPB */
PROVIDE( VPBDIV = 0xE01FC100);
/* TIMER 0 */
PROVIDE( T0IR = 0xE0004000);
PROVIDE( T0TCR = 0xE0004004);
PROVIDE( T0TC = 0xE0004008);
PROVIDE( T0PR = 0xE000400C);
PROVIDE( T0PC = 0xE0004010);
PROVIDE( T0MCR = 0xE0004014);
PROVIDE( T0MR0 = 0xE0004018);
PROVIDE( T0MR1 = 0xE000401C);
PROVIDE( T0MR2 = 0xE0004020);
PROVIDE( T0MR3 = 0xE0004024);
PROVIDE( T0CCR = 0xE0004028);
PROVIDE( T0CR0 = 0xE000402C);
PROVIDE( T0CR1 = 0xE0004030);
PROVIDE( T0CR2 = 0xE0004034);
PROVIDE( T0EMR = 0xE000403C);
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