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Partial Flash Programming (ctd)

Partial Flash Programming (ctd)

2004-12-08 by Leighton Rowe

Concerning Philips Apps' post on Partial Flash Programming I 
understand lpc flash memory can be updated 128 bits (minimum) at a 
time, and that a each 4K area can be written 16 times (max). 

(http://groups.yahoo.com/group/lpc2000/message/2681)

However, I'm currently having trouble updating 128-bit (quadword 
aligned) locations in flash memory. The first write always 
show up OK (as long as the location has all 1's), but on the 2nd 
write (on the same location) results in some bit(s) not displaying 
correctly.

Is it possible for me to re-write a 128-bit (quadword aligned) flash 
locations? Or must I erase the flash location first? I can do the 
second question, but I'm a little confused about how often flash 
bits can change without an erase.

best regards,
Leighton

Re: [lpc2000] Partial Flash Programming (ctd)

2004-12-08 by Robert Adsett

At 05:59 PM 12/8/04 +0000, you wrote:
>Concerning Philips Apps' post on Partial Flash Programming I
>understand lpc flash memory can be updated 128 bits (minimum) at a
>time, and that a each 4K area can be written 16 times (max).
>
>(http://groups.yahoo.com/group/lpc2000/message/2681)
>
>However, I'm currently having trouble updating 128-bit (quadword
>aligned) locations in flash memory. The first write always
>show up OK (as long as the location has all 1's), but on the 2nd
>write (on the same location) results in some bit(s) not displaying
>correctly.
>
>Is it possible for me to re-write a 128-bit (quadword aligned) flash
>locations? Or must I erase the flash location first? I can do the
>second question, but I'm a little confused about how often flash
>bits can change without an erase.

As I read that each 128 bit section can only be written once since a 
rewrite to change any bits would also change the ECC and since in that case 
some of the ECC bits are very likely to need to change back to a 1 state 
you are rather out of luck.

Robert

" 'Freedom' has no meaning of itself.  There are always restrictions,
be they legal, genetic, or physical.  If you don't believe me, try to
chew a radio signal. "

                         Kelvin Throop, III

Re: [lpc2000] Partial Flash Programming (ctd)

2004-12-09 by onestone

Flash bits can only be written to '0'. They erase to a '1' state. 
Therefore unless you are only changing a couple of bits to '0' you MUST 
erase flash everytime before reprogramming it.

Al

Leighton Rowe wrote:
Show quoted textHide quoted text
> 
> Concerning Philips Apps' post on Partial Flash Programming I
> understand lpc flash memory can be updated 128 bits (minimum) at a
> time, and that a each 4K area can be written 16 times (max).
> 
> (http://groups.yahoo.com/group/lpc2000/message/2681)
> 
> However, I'm currently having trouble updating 128-bit (quadword
> aligned) locations in flash memory. The first write always
> show up OK (as long as the location has all 1's), but on the 2nd
> write (on the same location) results in some bit(s) not displaying
> correctly.
> 
> Is it possible for me to re-write a 128-bit (quadword aligned) flash
> locations? Or must I erase the flash location first? I can do the
> second question, but I'm a little confused about how often flash
> bits can change without an erase.
> 
> best regards,
> Leighton
> 
> 
> 
> 
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Re: Partial Flash Programming (ctd)

2004-12-09 by philips_apps

Hi Al,

even changing some bits from 1 to 0 would generate a wrong reading.
The LPC2000 devices have an error correction  ECC mechanism build in.
 This is part of the flash and will be written the first time (after
erasing) the block of 128-bits is programmed. Any changes thereafter
will result in reading garbage because the ECC mechanism will try to
correct anything changed after the initial write.

The idea was to write one 128-bit block after the other, NOT writing
the same 128-bit block several times. This is possible 16 times within
a 4k block. So 16 writes to 16 different sections of 128-bit each
within a 4k block, then erase the 4k block.

Hopefully this clarifies this issue a little more. 


--- In lpc2000@yahoogroups.com, onestone <onestone@b...> wrote:
> Flash bits can only be written to '0'. They erase to a '1' state. 
> Therefore unless you are only changing a couple of bits to '0' you MUST 
> erase flash everytime before reprogramming it.
> 
> Al
> 
> Leighton Rowe wrote:
> 
> > 
> > Concerning Philips Apps' post on Partial Flash Programming I
> > understand lpc flash memory can be updated 128 bits (minimum) at a
> > time, and that a each 4K area can be written 16 times (max).
> > 
> > (http://groups.yahoo.com/group/lpc2000/message/2681)
> > 
> > However, I'm currently having trouble updating 128-bit (quadword
> > aligned) locations in flash memory. The first write always
> > show up OK (as long as the location has all 1's), but on the 2nd
> > write (on the same location) results in some bit(s) not displaying
> > correctly.
> > 
> > Is it possible for me to re-write a 128-bit (quadword aligned) flash
> > locations? Or must I erase the flash location first? I can do the
> > second question, but I'm a little confused about how often flash
> > bits can change without an erase.
> > 
> > best regards,
> > Leighton
> > 
> > 
> > 
> > 
> > Yahoo! Groups Sponsor
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Re: [lpc2000] Re: Partial Flash Programming (ctd)

2004-12-09 by onestone

Bugger! that totally screws up the filing system I use for flash 
database management, and probably the main application I have in mind 
for this part. My response was purely a generic one related to flash, as 
I've not yet got my hands on any LPC silicon.

philips_apps wrote:
Show quoted textHide quoted text
> 
> Hi Al,
> 
> even changing some bits from 1 to 0 would generate a wrong reading.
> The LPC2000 devices have an error correction  ECC mechanism build in.
> This is part of the flash and will be written the first time (after
> erasing) the block of 128-bits is programmed. Any changes thereafter
> will result in reading garbage because the ECC mechanism will try to
> correct anything changed after the initial write.
> 
> The idea was to write one 128-bit block after the other, NOT writing
> the same 128-bit block several times. This is possible 16 times within
> a 4k block. So 16 writes to 16 different sections of 128-bit each
> within a 4k block, then erase the 4k block.
> 
> Hopefully this clarifies this issue a little more.
> 
> 
> --- In lpc2000@yahoogroups.com, onestone <onestone@b...> wrote:
>  > Flash bits can only be written to '0'. They erase to a '1' state.
>  > Therefore unless you are only changing a couple of bits to '0' you MUST
>  > erase flash everytime before reprogramming it.
>  >
>  > Al
>  >
>  > Leighton Rowe wrote:
>  >
>  > >
>  > > Concerning Philips Apps' post on Partial Flash Programming I
>  > > understand lpc flash memory can be updated 128 bits (minimum) at a
>  > > time, and that a each 4K area can be written 16 times (max).
>  > >
>  > > (http://groups.yahoo.com/group/lpc2000/message/2681)
>  > >
>  > > However, I'm currently having trouble updating 128-bit (quadword
>  > > aligned) locations in flash memory. The first write always
>  > > show up OK (as long as the location has all 1's), but on the 2nd
>  > > write (on the same location) results in some bit(s) not displaying
>  > > correctly.
>  > >
>  > > Is it possible for me to re-write a 128-bit (quadword aligned) flash
>  > > locations? Or must I erase the flash location first? I can do the
>  > > second question, but I'm a little confused about how often flash
>  > > bits can change without an erase.
>  > >
>  > > best regards,
>  > > Leighton
>  > >
>  > >
>  > >
>  > >
>  > > Yahoo! Groups Sponsor
>  > >
> <http://us.ard.yahoo.com/SIG=129krqpo6/M=324847.5707095.6763799.3001176/D=groups/S=1706554205:HM/EXP=1102615194/A=2343726/R=0/SIG=12ibhs9he/*http://clk.atdmt.com/VON/go/yhxxxvon01900091von/direct/01/&time=1102528794344024 
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Re: [lpc2000] Re: Partial Flash Programming (ctd)

2004-12-09 by Bill Knight

Maybe I was sleeping when this changed so please let me know if
I am wrong.  For the LPC, shouldn't the block size be 512 bytes
and the sector size either 8K or 64K bytes instead of a block size
of 128 bits and a ??? size of 4K???

Confused a bit
-Bill Knight
http://www.theARMPatch.com



On Thu, 09 Dec 2004 07:25:17 -0000, philips_apps wrote:



Hi Al,

even changing some bits from 1 to 0 would generate a wrong reading.
The LPC2000 devices have an error correction  ECC mechanism build in.
 This is part of the flash and will be written the first time (after
erasing) the block of 128-bits is programmed. Any changes thereafter
will result in reading garbage because the ECC mechanism will try to
correct anything changed after the initial write.

The idea was to write one 128-bit block after the other, NOT writing
the same 128-bit block several times. This is possible 16 times within
a 4k block. So 16 writes to 16 different sections of 128-bit each
within a 4k block, then erase the 4k block.

Hopefully this clarifies this issue a little more.

Re: [lpc2000] Re: Partial Flash Programming (ctd)

2004-12-10 by Bill Knight

Ok, I think my confusion is cleared up a bit.  It came from a mix of
the IAP interface to erase & program the flash and the flash
implementation as descibed by Philips Apps at the end of this message.

In small steps:

1) Data are stored in flash as 128-bit words (plus ecc bits)

2) Because of the ecc bits, each 128-bit word may only be programmed
once without being erased.

3) Multiple 128-bit words are combined in a 4096-bit (512-byte) block.

4) The IAP interface only allows programming of some multiple of
4096-bit (512-byte) blocks (1-512, 2-1024, 8-4096, 16-8192).
Therefore, programming any unprogrammed 128-bit words (16-byte) first
requires copying the 512 byte block in which it resides to a RAM
buffer, adding the new data to the RAM buffer, then using the IAP to
reprogram the 512 byte block.  Erasing the flash first is not required
as long as the new data does not overlay a previously programmed
128-bit word.

5) While a 4096-bit block could potentially be erased, the IAP
interface combines a number of them into 8K/64K sectors and allows
only sectors to be erased.

PLEASE let me know if this is accurate and correct me if it is in
error.

Thanks
-Bill Knight
http://www.theARMPatch.com 

<snip>

On Thu, 09 Dec 2004 07:25:17 -0000, philips_apps wrote:

Hi Al,

even changing some bits from 1 to 0 would generate a wrong reading.
The LPC2000 devices have an error correction  ECC mechanism build in.
 This is part of the flash and will be written the first time (after
erasing) the block of 128-bits is programmed. Any changes thereafter
will result in reading garbage because the ECC mechanism will try to
correct anything changed after the initial write.

The idea was to write one 128-bit block after the other, NOT writing
the same 128-bit block several times. This is possible 16 times within
a 4k block. So 16 writes to 16 different sections of 128-bit each
within a 4k block, then erase the 4k block.

Hopefully this clarifies this issue a little more.

Re: [lpc2000] Re: Partial Flash Programming (ctd)

2004-12-11 by Leighton Rowe

Thank you all for the input. Everything makes sense to me.
 
I guess the main challenge now to use appropriately sized RAM buffers during IAP calls whenever I'm updating the firmware sectors...without corrupting critical pieces of code (vector table, IAP programmer, etc.) 
 
Leighton

Bill Knight <BillK@...> wrote:
Ok, I think my confusion is cleared up a bit.  It came from a mix of
the IAP interface to erase & program the flash and the flash
implementation as descibed by Philips Apps at the end of this message.

In small steps:

1) Data are stored in flash as 128-bit words (plus ecc bits)

2) Because of the ecc bits, each 128-bit word may only be programmed
once without being erased.

3) Multiple 128-bit words are combined in a 4096-bit (512-byte) block.

4) The IAP interface only allows programming of some multiple of
4096-bit (512-byte) blocks (1-512, 2-1024, 8-4096, 16-8192).
Therefore, programming any unprogrammed 128-bit words (16-byte) first
requires copying the 512 byte block in which it resides to a RAM
buffer, adding the new data to the RAM buffer, then using the IAP to
reprogram the 512 byte block.  Erasing the flash first is not required
as long as the new data does not overlay a previously programmed
128-bit word.

5) While a 4096-bit block could potentially be erased, the IAP
interface combines a number of them into 8K/64K sectors and allows
only sectors to be erased.

PLEASE let me know if this is accurate and correct me if it is in
error.

Thanks
-Bill Knight
http://www.theARMPatch.com 

<snip>

On Thu, 09 Dec 2004 07:25:17 -0000, philips_apps wrote:

Hi Al,

even changing some bits from 1 to 0 would generate a wrong reading.
The LPC2000 devices have an error correction  ECC mechanism build in.
This is part of the flash and will be written the first time (after
erasing) the block of 128-bits is programmed. Any changes thereafter
will result in reading garbage because the ECC mechanism will try to
correct anything changed after the initial write.

The idea was to write one 128-bit block after the other, NOT writing
the same 128-bit block several times. This is possible 16 times within
a 4k block. So 16 writes to 16 different sections of 128-bit each
within a 4k block, then erase the 4k block.

Hopefully this clarifies this issue a little more. 




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Re: Partial Flash Programming (ctd)

2004-12-11 by philips_apps

Hi Bill,

thanks for writing it more clearly than I did. Yes you got it. Don't
forget the rule of max 16 writes to a 4k block. Means you can not
write the whole 4k before erasing it again.

Robert

--- In lpc2000@yahoogroups.com, "Bill Knight" <BillK@t...> wrote:
Show quoted textHide quoted text
> Ok, I think my confusion is cleared up a bit.  It came from a mix of
> the IAP interface to erase & program the flash and the flash
> implementation as descibed by Philips Apps at the end of this message.
> 
> In small steps:
> 
> 1) Data are stored in flash as 128-bit words (plus ecc bits)
> 
> 2) Because of the ecc bits, each 128-bit word may only be programmed
> once without being erased.
> 
> 3) Multiple 128-bit words are combined in a 4096-bit (512-byte) block.
> 
> 4) The IAP interface only allows programming of some multiple of
> 4096-bit (512-byte) blocks (1-512, 2-1024, 8-4096, 16-8192).
> Therefore, programming any unprogrammed 128-bit words (16-byte) first
> requires copying the 512 byte block in which it resides to a RAM
> buffer, adding the new data to the RAM buffer, then using the IAP to
> reprogram the 512 byte block.  Erasing the flash first is not required
> as long as the new data does not overlay a previously programmed
> 128-bit word.
> 
> 5) While a 4096-bit block could potentially be erased, the IAP
> interface combines a number of them into 8K/64K sectors and allows
> only sectors to be erased.
> 
> PLEASE let me know if this is accurate and correct me if it is in
> error.
> 
> Thanks
> -Bill Knight
> http://www.theARMPatch.com 
> 
> <snip>
> 
> On Thu, 09 Dec 2004 07:25:17 -0000, philips_apps wrote:
> 
> Hi Al,
> 
> even changing some bits from 1 to 0 would generate a wrong reading.
> The LPC2000 devices have an error correction  ECC mechanism build in.
>  This is part of the flash and will be written the first time (after
> erasing) the block of 128-bits is programmed. Any changes thereafter
> will result in reading garbage because the ECC mechanism will try to
> correct anything changed after the initial write.
> 
> The idea was to write one 128-bit block after the other, NOT writing
> the same 128-bit block several times. This is possible 16 times within
> a 4k block. So 16 writes to 16 different sections of 128-bit each
> within a 4k block, then erase the 4k block.
> 
> Hopefully this clarifies this issue a little more.

Re: Partial Flash Programming (ctd)

2004-12-17 by tom_laffey

Hi,

First off, I now realize that I was missing the ECC interaction in my 
earlier post (http://groups.yahoo.com/group/lpc2000/message/4102)  
Thanks to Leighton for posting the reference to article 2681, as I 
hadn't gone far enough back in the archive to find it.

Since ECC is intended to correct single bit errors, it seems to me 
that I might be able to construct multi-bit changes ("errors") that 
will not affect the computed ECC value.  Thus the 4-byte word I use 
to track my image state might potentially have several usable values 
that are compatible with the original ECC entry. My sectoring 
arrangement requires only 4 states, so I don't need too many patterns 
and the 16 writes per row limit is a distant worry.

Trouble is, I don't know how the ECC value is calculated, so I don't 
know how to work out bit patterns to use.  There are books available 
on the subject, but what I really need to know is how the LPC works.  
Philips, can you help with this?  

Here's an illustrative example.  Would a simple progression such as 
the following work?  E.g., for one particular word in the row 
changing, all other values constant:

  0xFFFFFFFF (erased)
  0xFFF0FFF0 (ECC calculated here)
  0xFF00FF00 (compatible ECC?)
  0xF000F000 
  0x00000000
 
Thanks,


Tom


--- In lpc2000@yahoogroups.com, onestone <onestone@b...> wrote:
> Bugger! that totally screws up the filing system I use for flash 
> database management, and probably the main application I have in 
mind 
> for this part. My response was purely a generic one related to 
flash, as 
> I've not yet got my hands on any LPC silicon.
> 
> philips_apps wrote:
> 
> > 
> > Hi Al,
> > 
> > even changing some bits from 1 to 0 would generate a wrong 
reading.
> > The LPC2000 devices have an error correction  ECC mechanism build 
in.
> > This is part of the flash and will be written the first time 
(after
> > erasing) the block of 128-bits is programmed. Any changes 
thereafter
> > will result in reading garbage because the ECC mechanism will try 
to
> > correct anything changed after the initial write.
> > 
> > The idea was to write one 128-bit block after the other, NOT 
writing
> > the same 128-bit block several times. This is possible 16 times 
within
> > a 4k block. So 16 writes to 16 different sections of 128-bit each
> > within a 4k block, then erase the 4k block.
> > 
> > Hopefully this clarifies this issue a little more.
> > 
> > 
> > --- In lpc2000@yahoogroups.com, onestone <onestone@b...> wrote:
> >  > Flash bits can only be written to '0'. They erase to a '1' 
state.
> >  > Therefore unless you are only changing a couple of bits to '0' 
you MUST
> >  > erase flash everytime before reprogramming it.
> >  >
> >  > Al
> >  >
> >  > Leighton Rowe wrote:
> >  >
> >  > >
> >  > > Concerning Philips Apps' post on Partial Flash Programming I
> >  > > understand lpc flash memory can be updated 128 bits 
(minimum) at a
> >  > > time, and that a each 4K area can be written 16 times (max).
> >  > >
> >  > > (http://groups.yahoo.com/group/lpc2000/message/2681)
> >  > >
> >  > > However, I'm currently having trouble updating 128-bit 
(quadword
> >  > > aligned) locations in flash memory. The first write always
> >  > > show up OK (as long as the location has all 1's), but on the 
2nd
> >  > > write (on the same location) results in some bit(s) not 
displaying
> >  > > correctly.
> >  > >
> >  > > Is it possible for me to re-write a 128-bit (quadword 
aligned) flash
> >  > > locations? Or must I erase the flash location first? I can 
do the
> >  > > second question, but I'm a little confused about how often 
flash
Show quoted textHide quoted text
> >  > > bits can change without an erase.
> >  > >
> >  > > best regards,
> >  > > Leighton
> >  > >
> >  > >

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