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IO pins during Reset

IO pins during Reset

2005-01-06 by jamesasteres

Here's a question I don't think is in the databook.  Do the IO pins 
toggle any while Reset is asserted active (low)?  I have a hardware 
watchdog that does not like Reset active AND WDI pin toggling at the 
same time.
James

Re: IO pins during Reset

2005-01-07 by lp2000c

During reset, the i/o pins are set as inputs (hi impedence).  If the 
watchdog chip has no internal biasing for its input, the line will 
float and may toggle based on picking up noise from the air.  You 
could add a pull-up or pull-down resistor to define the level.

However, it sounds strange that this should cause a problem.  What 
watchdog chip are you using?


--- In lpc2000@yahoogroups.com, "jamesasteres" <jamesasteres@y...> 
wrote:
> 
> Here's a question I don't think is in the databook.  Do the IO pins 
> toggle any while Reset is asserted active (low)?  I have a hardware 
> watchdog that does not like Reset active AND WDI pin toggling at 
the 
> same time.
> James

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