Yahoo Groups archive

Lpc2000

Index last updated: 2026-04-28 23:31 UTC

Thread

OCD Debugger, hw breakpoint and flash

OCD Debugger, hw breakpoint and flash

2005-06-29 by Micron Engineering

Is there any hw interface that may set hw breakpoints on flash and also 
may be interfaced with low cost debuggers as Insight?
Massimo Manca, Micron Engineers


-- 
No virus found in this outgoing message.
Checked by AVG Anti-Virus.
Version: 7.0.323 / Virus Database: 267.8.6/33 - Release Date: 28/06/2005

Re: [lpc2000] OCD Debugger, hw breakpoint and flash

2005-06-29 by Bill Knight

On Wed, 29 Jun 2005 22:42:25 +0200, Micron Engineering wrote:

>Is there any hw interface that may set hw breakpoints on flash and also 
>may be interfaced with low cost debuggers as Insight?
>Massimo Manca, Micron Engineers

The processor itself will support two hardware breakpoints.  They can be
accessed from Insight.  I have the following in my .gdbinit file.

===================================================================================
# Define some macros for setting & clearing breakpoints using the EmbeddedICE logic
define ib
   monitor reg w$arg0av = $arg1
   monitor reg w$arg0am = 1
   monitor reg w$arg0dv = 0
   monitor reg w$arg0dm = 0xFFFFFFFF
   monitor reg w$arg0cv = 0x100
   monitor reg w$arg0cm = 0xFFFFFEF7
end

document ib
ib <idx> <addr>
Configures hardware Instruction Breakpoint <idx> (0 or 1 for ARM7TDMI)
to break at address <addr>.  To disable the breakpoint, set <addr> to
some address that won't be executed or use 'db <idx>'.
end

define db
   monitor reg w$arg0av = 0xFFFFFFFF
   monitor reg w$arg0am = 1
   monitor reg w$arg0dv = 0
   monitor reg w$arg0dm = 0xFFFFFFFF
   monitor reg w$arg0cv = 0x100
   monitor reg w$arg0cm = 0xFFFFFEF7
end

document db
db <idx>
Disable hardware instruction Breakpoint <idx> by setting it to 0xFFFFFFFF
end
====================================================================================

I didn't write the macros but have found them useful.  Other ARM toolsets like CrossWorks
for ARM by Rowley have debuggers which support the hardware breakpoints much more
cleanly than the above gdb macros

Regards
-Bill Knight
R O SoftWare &
http://www.theARMPatch.com

Re: [lpc2000] OCD Debugger, hw breakpoint and flash

2005-06-30 by Rod Moffitt

Just in case you were wondering who authored those GDB scripts, it was me! 
You can get all the info on how they work, and the original scripts from 
my site at:

http://rod.info/arm.html

- Rod

--
                          ___  ____  ___    _      ___
  Rod Moffitt            / _ \/ __ \/ _ \  (_)__  / _/__
  http://rod.info       / , _/ /_/ / // / / / _ \/ _/ _ \
  rodANTISPAM@... /_/|_|\____/____(*)_/_//_/_/ \___/
  =======================================================
  ~ Where loved ones are remembered http://memoriam.org ~
Show quoted textHide quoted text
On Wed, 29 Jun 2005, Bill Knight wrote:

> On Wed, 29 Jun 2005 22:42:25 +0200, Micron Engineering wrote:
>
>> Is there any hw interface that may set hw breakpoints on flash and also
>> may be interfaced with low cost debuggers as Insight?
>> Massimo Manca, Micron Engineers
>
> The processor itself will support two hardware breakpoints.  They can be
> accessed from Insight.  I have the following in my .gdbinit file.
>
> ===================================================================================
> # Define some macros for setting & clearing breakpoints using the EmbeddedICE logic
> define ib
>   monitor reg w$arg0av = $arg1
>   monitor reg w$arg0am = 1
>   monitor reg w$arg0dv = 0
>   monitor reg w$arg0dm = 0xFFFFFFFF
>   monitor reg w$arg0cv = 0x100
>   monitor reg w$arg0cm = 0xFFFFFEF7
> end
>
> document ib
> ib <idx> <addr>
> Configures hardware Instruction Breakpoint <idx> (0 or 1 for ARM7TDMI)
> to break at address <addr>.  To disable the breakpoint, set <addr> to
> some address that won't be executed or use 'db <idx>'.
> end
>
> define db
>   monitor reg w$arg0av = 0xFFFFFFFF
>   monitor reg w$arg0am = 1
>   monitor reg w$arg0dv = 0
>   monitor reg w$arg0dm = 0xFFFFFFFF
>   monitor reg w$arg0cv = 0x100
>   monitor reg w$arg0cm = 0xFFFFFEF7
> end
>
> document db
> db <idx>
> Disable hardware instruction Breakpoint <idx> by setting it to 0xFFFFFFFF
> end
> ====================================================================================
>
> I didn't write the macros but have found them useful.  Other ARM toolsets like CrossWorks
> for ARM by Rowley have debuggers which support the hardware breakpoints much more
> cleanly than the above gdb macros
>
> Regards
> -Bill Knight
> R O SoftWare &
> http://www.theARMPatch.com
>
>
>
>
>
>
>
>
> Yahoo! Groups Links
>
>
>
>
>
>
>

Re: [lpc2000] OCD Debugger, hw breakpoint and flash

2005-06-30 by Bill Knight

Thanks Rod.  I tucked them inot my gdbinit file quite a while back and
unfortunately, promptly forgot who wrote them.  They have been very helpful
in getting Insight to debug flash based code.

-Bill
Show quoted textHide quoted text
On Wed, 29 Jun 2005 23:41:45 -0400 (EDT), Rod Moffitt wrote:

>Just in case you were wondering who authored those GDB scripts, it was me! 
>You can get all the info on how they work, and the original scripts from 
>my site at:

>http://rod.info/arm.html

>- Rod

>--
>                          ___  ____  ___    _      ___
>  Rod Moffitt            / _ \/ __ \/ _ \  (_)__  / _/__
>  http://rod.info       / , _/ /_/ / // / / / _ \/ _/ _ \
>  rodANTISPAM@... /_/|_|\____/____(*)_/_//_/_/ \___/
>  =======================================================
>  ~ Where loved ones are remembered http://memoriam.org ~

>On Wed, 29 Jun 2005, Bill Knight wrote:

>> On Wed, 29 Jun 2005 22:42:25 +0200, Micron Engineering wrote:
>>
>>> Is there any hw interface that may set hw breakpoints on flash and also
>>> may be interfaced with low cost debuggers as Insight?
>>> Massimo Manca, Micron Engineers
>>
>> The processor itself will support two hardware breakpoints.  They can be
>> accessed from Insight.  I have the following in my .gdbinit file.
>>
>> ===================================================================================
>> # Define some macros for setting & clearing breakpoints using the EmbeddedICE logic
>> define ib
>>   monitor reg w$arg0av = $arg1
>>   monitor reg w$arg0am = 1
>>   monitor reg w$arg0dv = 0
>>   monitor reg w$arg0dm = 0xFFFFFFFF
>>   monitor reg w$arg0cv = 0x100
>>   monitor reg w$arg0cm = 0xFFFFFEF7
>> end
>>
>> document ib
>> ib <idx> <addr>
>> Configures hardware Instruction Breakpoint <idx> (0 or 1 for ARM7TDMI)
>> to break at address <addr>.  To disable the breakpoint, set <addr> to
>> some address that won't be executed or use 'db <idx>'.
>> end
>>
>> define db
>>   monitor reg w$arg0av = 0xFFFFFFFF
>>   monitor reg w$arg0am = 1
>>   monitor reg w$arg0dv = 0
>>   monitor reg w$arg0dm = 0xFFFFFFFF
>>   monitor reg w$arg0cv = 0x100
>>   monitor reg w$arg0cm = 0xFFFFFEF7
>> end
>>
>> document db
>> db <idx>
>> Disable hardware instruction Breakpoint <idx> by setting it to 0xFFFFFFFF
>> end
>> ====================================================================================
>>
>> I didn't write the macros but have found them useful.  Other ARM toolsets like CrossWorks
>> for ARM by Rowley have debuggers which support the hardware breakpoints much more
>> cleanly than the above gdb macros
>>
>> Regards
>> -Bill Knight
>> R O SoftWare &
>> http://www.theARMPatch.com
>>
>>
>>
>>
>>
>>
>>
>>
>> Yahoo! Groups Links
>>
>>
>>
>>
>>
>>
>>


> 
>Yahoo! Groups Links



>

Re: [lpc2000] OCD Debugger, hw breakpoint and flash

2005-07-03 by Rod Moffitt

Glad to have helped out!

- Rod

--
                          ___  ____  ___    _      ___
  Rod Moffitt            / _ \/ __ \/ _ \  (_)__  / _/__
  http://rod.info       / , _/ /_/ / // / / / _ \/ _/ _ \
  rodANTISPAM@... /_/|_|\____/____(*)_/_//_/_/ \___/
  =======================================================
  ~ Where loved ones are remembered http://memoriam.org ~
Show quoted textHide quoted text
On Thu, 30 Jun 2005, Bill Knight wrote:

> Thanks Rod.  I tucked them inot my gdbinit file quite a while back and
> unfortunately, promptly forgot who wrote them.  They have been very helpful
> in getting Insight to debug flash based code.
>
> -Bill
>
>
>
> On Wed, 29 Jun 2005 23:41:45 -0400 (EDT), Rod Moffitt wrote:
>
>> Just in case you were wondering who authored those GDB scripts, it was me!
>> You can get all the info on how they work, and the original scripts from
>> my site at:
>
>> http://rod.info/arm.html
>
>> - Rod
>
>> --
>>                          ___  ____  ___    _      ___
>>  Rod Moffitt            / _ \/ __ \/ _ \  (_)__  / _/__
>>  http://rod.info       / , _/ /_/ / // / / / _ \/ _/ _ \
>>  rodANTISPAM@... /_/|_|\____/____(*)_/_//_/_/ \___/
>>  =======================================================
>>  ~ Where loved ones are remembered http://memoriam.org ~
>
>> On Wed, 29 Jun 2005, Bill Knight wrote:
>
>>> On Wed, 29 Jun 2005 22:42:25 +0200, Micron Engineering wrote:
>>>
>>>> Is there any hw interface that may set hw breakpoints on flash and also
>>>> may be interfaced with low cost debuggers as Insight?
>>>> Massimo Manca, Micron Engineers
>>>
>>> The processor itself will support two hardware breakpoints.  They can be
>>> accessed from Insight.  I have the following in my .gdbinit file.
>>>
>>> ===================================================================================
>>> # Define some macros for setting & clearing breakpoints using the EmbeddedICE logic
>>> define ib
>>>   monitor reg w$arg0av = $arg1
>>>   monitor reg w$arg0am = 1
>>>   monitor reg w$arg0dv = 0
>>>   monitor reg w$arg0dm = 0xFFFFFFFF
>>>   monitor reg w$arg0cv = 0x100
>>>   monitor reg w$arg0cm = 0xFFFFFEF7
>>> end
>>>
>>> document ib
>>> ib <idx> <addr>
>>> Configures hardware Instruction Breakpoint <idx> (0 or 1 for ARM7TDMI)
>>> to break at address <addr>.  To disable the breakpoint, set <addr> to
>>> some address that won't be executed or use 'db <idx>'.
>>> end
>>>
>>> define db
>>>   monitor reg w$arg0av = 0xFFFFFFFF
>>>   monitor reg w$arg0am = 1
>>>   monitor reg w$arg0dv = 0
>>>   monitor reg w$arg0dm = 0xFFFFFFFF
>>>   monitor reg w$arg0cv = 0x100
>>>   monitor reg w$arg0cm = 0xFFFFFEF7
>>> end
>>>
>>> document db
>>> db <idx>
>>> Disable hardware instruction Breakpoint <idx> by setting it to 0xFFFFFFFF
>>> end
>>> ====================================================================================
>>>
>>> I didn't write the macros but have found them useful.  Other ARM toolsets like CrossWorks
>>> for ARM by Rowley have debuggers which support the hardware breakpoints much more
>>> cleanly than the above gdb macros
>>>
>>> Regards
>>> -Bill Knight
>>> R O SoftWare &
>>> http://www.theARMPatch.com
>>>
>>>
>>>
>>>
>>>
>>>
>>>
>>>
>>> Yahoo! Groups Links
>>>
>>>
>>>
>>>
>>>
>>>
>>>
>
>
>>
>> Yahoo! Groups Links
>
>
>
>>
>
>
>
>
>
>
>
>
> Yahoo! Groups Links
>
>
>
>
>
>
>

Move to quarantaine

This moves the raw source file on disk only. The archive index is not changed automatically, so you still need to run a manual refresh afterward.