[sdiy] Daffy CMOS ASCIImatic

Jim Patchell patchell at silcom.com
Mon Apr 29 16:38:24 CEST 2002



jhaible at debitel.net wrote:

> Just a thought:
> FETs as linear VC resistors need a rather small signal level.
> OTOH linear amplifiers built from 4000 series CMOS chips
> are not exactly low-noise, so they benefit from rather high signal
> levels.
> Both are good ideas, but I would not necessarily use them *together*.
>
> I have often thought how nice it would be to have a "low noise" version
> of a 4007 or a 4069. Of course it would be possible to do similar things
> with discreete transistors, but that's expensive, and the elegance of the
> creative use of a low cost 4007 would be lost ...
> (I think there used to be a - rather expensive - CA3xxx part with a CD4007
> configuration, but I never checked this.)

    Yes, the CA3600...same pinout as I remember...If I can find the data sheet,
I will post it....don't hold your breath.  That was in a data book that dated
from a time when I was still throwing away old data books....because I never
figured on the fact that parts would no longer be made.

>
>
> I have not thought this thru entirely, mind you. So I cannot quantify
> "noisy" at this point. Maybe part of it just comes from the high resistor
> values that are typical for linear 4000-series applications. (If you're
> using small feedback resistors, they are loading the amp outputs, which are
> just two current sources in open-loop case, more or less.)
>
> JH.
>
> At 19:07 28.04.02, Scott Gravenhorst wrote:
> >Or a dual supply, +/- 7.5 Volts  and then the load goes to
> >ground ?
>
> Right, something like that.
>
> >I thought about this, couldn't figure why...  I assume you
> >mean to use the 2nd linear inverter like a cv preamp to this?
>
> The output of the "switch" would be run directly into the
> inverting input of that invertor.
>
> >I don't get this.  Which input and why?  CV in?  I've seen
> >this in single transistor units (drain to gate) but it's
> >coupled with a resistor.  Is this a linearity improvement?
>
> If one uses such a configuration, the output of the two MOSFETs is
> held at a constant potential. This should improve linearity.
>
> >Also, I looked at this again, and I think that if only one inverter
> >is used, this can be made out of one 4007.  Powering it will have no
> >effect on protection diodes turning on.  Only an analog signal out
> >side of the rail-rail boundarys would cause problems.  Also I think
> >the other pair of transistors could make another VC resistor that
> >reponds reverse of the first.  VC pot?
>
> That would be interesting.
>
> Cheers,
>  René




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