Chameleon, Re: [sdiy] Simmons sds

[john mahoney]

> > Maybe I went a little too far. (Paul?)
>
> thats the monowaveII..

Then the SDS really is a piece of cake for you.


> > I'm wondering how much work it would be to add hard sync. I guess you've
> got
> > to check for a zero crossing as you generate each sample of the
"sync-to"
> > osc, which shouldn't be too much extra load on the DSP.
>
> the hard part is it means a test/branch, something you try to avoid in DSP
> as it gives an unpredictable number of instructions per loop (sometimes
you
> jump, sometimes you dont)

Obviously hard for me to say without understanding how you generate a wave
on the Chameleon, but if osc1 crosses zero then you just reset osc2 's
parameters to their starting points. But...

Are you saying that the DSP loop must consume a fixed number of cycles per
iteration? Does every test/branch therefore require a "no op" branch that
will consume the same number of cycles as the "do something" branch? Of
course, you can program your way around the unpredicable number of
instructions problem, although it seems a shame to throw cycles away. OTOH,
you can't really expect to make the DSP 100% productive.

Since osc sync is fairly simple, we are not talking about a lot of
instructions, either way.

With extra work you can minimize this kind of waste by allowing for some
timing slop. For example, if you can allow the osc sync to be late by a
sample or 2, then you can skip the "check for sync" if you had to do some
other extra work in the current cycle. Or, you do the "check for sync" each
time but you defer the "enforce sync on osc2" until another loop. But this
all depends on a number of factors.

By the way, does every Chameleon instruction consume the same amount of
clock cycles? (I suppose I should read the documentation!)
--
john