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RE: [68300] 68332 clock frequency

2002-12-16 by Melear Charles-rdph40

Joachim,
 
There are two problems that you need to be aware of.
 
1.  The only mask set of the MC68332 that is in production is J30C.  (J66A is an identical mask set made in another wafer line.)  For J30C and J66A, the 3-component XFC filter is required.  If you don't use the 3-component filter, your circuit will have clock jitter.  Sometimes it can get bad enough to mess up asynchronous serial communications devices and cause bit error problems.
 
2.  If you DO NOT set the X bit = 1 in the SYNCR register, the VCO will run too fast, lose lock and then all bets are off on what system frequency will result.  So, if you are going to run the system clock above 8.3 MHz, the X bit in the SYNCR register MUST (there are no other options here) be set to a logic 1.  Then, calculate the W and Y bits to get the frequency you want.
 
Let me know if this works.
 
Charlie

-----Original Message-----
From: Entwicklung [mailto:Entwicklung@...]
Sent: Monday, December 16, 2002 8:40 AM
To: 68300@yahoogroups.com
Subject: [68300] 68332 clock frequency


Hello everyone.

I have two questions to the clock generator of the MC68332CFC25MHz
with a 32,768 kHz reference.
Does somebody know the maximum of the clock freqency I can reach.
In my system the clock frequency is ok till 20,971Mhz. Higher values in the
sync-register, which forces greater frequencies than 20,971MHz are not
stable.
And the frequencies are not equal to the value I expected.

Is this normal effect, or could be something wrong with my device.

Thanks
Joachim


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