RE: [68300] Migration from 68LC302 to ???
2007-06-20 by Fraser Hayden-ra9482
Please, take a look at our ColdFire processors. in particular the MCF5282 and the Kirin family of devices. Both of these families have a more powerful 32bit
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Re: [68300] Migration from 68LC302 to ???
2007-06-18 by Aaron J. Grier
... if you are executing from flash, you may not be able to get this, as flash speeds seem to be limited to ~25MHz. (the workaround is copy/decompress to RAM,
Re: Migration from 68LC302 to ???
2007-06-17 by Dimiter Popoff
Another choice I can think of - without flash and somewhat overkill, perhaps - is Freescales MPC5200B. It consumes about 1W at full power - having a 400 MHz
Migration from 68LC302 to ???
2007-06-17 by Marty Burns
All, Have a design using an 68LC302. We are starting a next version design. Looking for a migration path to a more powerfull 32 bit processor. Looking for
Re: [68300] Proper way to acknowledge a PIT interrupt
2007-03-20 by Andrei Chichak
Hi Jeff (and everybody else) ... No, I didn t. The possible issue with the PIT interrupt seems to have been teaser. As we have seen from the various responses,
Re: [68300] Proper way to acknowledge a PIT interrupt
2007-03-20 by jeffrey.tenney@gm.com
Andrei, Did you find the bug yet? If not have you seen the errata about having an external device using the same interrupt level as the PIT? Could that be
Re: [68300] Re: Proper way to acknowledge a PIT interrupt
2007-03-14 by twalter@austin.rr.com
PIT just does it thing! SXSW (south by southwest) Festival this week, as is Spring Break in the Austin,TX area. http://2007.sxsw.com/ Where s Charlie
Re: Proper way to acknowledge a PIT interrupt
2007-03-14 by andreichichak
Thanks Scott, I thought it was rather odd that it doesn t need an ack. Have all of the Freescale people left the building? Andrei
Re: [68300] Proper way to acknowledge a PIT interrupt
2007-03-14 by Scott Newell
... My code doesn t. Checked the SIM book and the SIM section in the 360 book; neither mentions any ack requirement. -- newell N5TNL
Proper way to acknowledge a PIT interrupt
2007-03-13 by andreichichak
Hi All Y All, In trying to track down a niggly bug on my 332, I came across a question... You typically have to acknowledge an interrupt somehow, by clearing
Jim Hill/ABS is out of the office.
2006-12-27 by jlhill@AircraftBraking.com
I will be out of the office starting 12/20/2006 and will not return until 01/02/2007. I will respond to your message when I return.
ITC and PMA/PMM timing relationship.
2006-12-27 by andreichichak
Hi all, I seem to be having a bit of problem getting synchronization when using ITC and PMM. My signal source sends out a pulse to the ITC channel just before
Re: [68300] Not able to clear pending CISR Flag in interrupt routine *>Help please
2006-07-13 by Andrei Chichak
Hi Ivo, ... Did you ever get a response to this? In a previous life, I used a 68332 do make 8 half uarts (4 transmitters and 4 receivers). I set up the
Not able to clear pending CISR Flag in interrupt routine *>Help please
2006-07-03 by Ivo Strebel
Hello 68300 community, CPU: 68332 I have no clue what s going on. I use six TPU-Channels as UART (3*Rx,3*Tx). At some point one of those channels * not always
M*CORE
2006-01-27 by Zoltán Kócsi
It s not really a 683xx chip, however, would anyone know if there s a debugger for that beast on Linux that can work with ELF files? The gdb people deleted the
RE: [68300] TPU as a input Mask set G
2005-12-09 by Honnold John-r37277
Hi Guys: Be sure to take a look at http://www.freescale.com/webapp/sps/site/prod_summary.jsp?code=MC68332&nodeId=018rH3YTLC0795. This is the website for the
Re: [68300] TPU as a input Mask set G
2005-12-09 by Scott Newell
... I just use HALLD instead. -- newell
Re: [68300] TPU as a input Mask set G
2005-12-09 by Zoltán Kócsi
... Compile your own TPU function set. It sounds scary but actually it is fairly easy. You can mix and match any functions from sets A and G (well, as long as
TPU as a input Mask set G
2005-12-09 by Ivo Strebel
Hello 68300 community, hope anybody can help me solving following problem: CPU: 68332 mask set G Problem: I have to use tpu channel 11 as an input.
RE: [68300] Re: P&E Micro CPU32 BDM Interface
2005-09-15 by Avi Cohen Stuart
Jochem, www.cygwin.com will get you a full blown GNU environment. In any case you ll need Cygwin in case you want to switch to the gnu tools suite in
Re: P&E Micro CPU32 BDM Interface
2005-09-15 by jochen_stroebel
Hello Avi, i habe the driver package from sourceforge, but no possibility to build it, because i dont have the GNU-Develloping tools on my computer... and its
RE: [68300] Re: P&E Micro CPU32 BDM Interface
2005-09-14 by Avi Cohen Stuart
Jochen, The BDM driver mentioned on the sourceforge.net works flawless on XP/2000 using giveio.sys. There is no need to write another driver. I tried on w2k to
Re: P&E Micro CPU32 BDM Interface
2005-09-14 by jochen_stroebel
... little ... on ... I will do it so, if all other way fail. My homemade PD-BDM Interface is not testet completely, yet and i plan to write my own litte BDM
Re: P&E Micro CPU32 BDM Interface
2005-09-13 by Aaron J. Grier
... you could use the GNU debugger with your existing PD-BDM-Interface. ... the ICD32 part is/was made by P&E. it is the same part. ... I do not know. --
Re: P&E Micro CPU32 BDM Interface
2005-09-13 by avics2001
Jochen, I can send you a pre-programmed GAL if you like. Or even a design for a BDM P&E Micro design single layer print that I designed with Eagle. I don t
Re: P&E Micro CPU32 BDM Interface
2005-09-13 by jochen_stroebel
Hi, thanks for your answer ... the ... at ... Yes, but for a Student ist a little expensive, if you see the little logic function the GAL has to do, perhaps
Re: P&E Micro CPU32 BDM Interface
2005-09-12 by Aaron J. Grier
... p&e still sells BDM interfaces for CPU32 processors. http://www.pemicro.com/ . there is also a reverse-engineered schematic and source code for a GAL to
P&E Micro CPU32 BDM Interface
2005-09-12 by jochen_stroebel
Hello, i need some help, I use Codewarrior for 68k (legal version) and want to test/programm an 68360 QUICC-Board. Unfortunately the BDM-Parallel Interface ist
Freescale direction
2005-06-28 by Tim
I just read an interview on embedded.com with Mr. Mayer of Freescale. Freescale is to become more directed at embedded. Metrowerks will disappear into
Fwd: [68300] Clock drift
2005-06-10 by Tim
I thought that was a kind a dumb mistake of mine, to have bits wrong. Then I looked at my 68376 documentation. It says that the numbers I was running are OK.
Re: [68300] Digest Number 198
2005-06-06 by jhgreen@parker.com
The SJA1000 allows both a programmable prescaler and bit length. using 20.97MHz, divide by 6 (BRP = 2), and 14 time period; as an example TSEG1=6, TSEG2=6
Re: [68300] Clock drift
2005-06-03 by Tim
Thanks to Charlie! In my start up code for the clock (SYNCR) I had X bit = 0. A no-no @ 20.45 MHz. Changed the SYNCR value as per Charlie s recommendation and
Clock drift
2005-06-03 by Tim
Hello Group ( I hope there are people still out there ), I have an issue with clock drift with temperature. I have a -20 to +60C 4.194 MHz crystal on a 68376
Re: [68300] Intentional momentary I/O contention
2005-04-25 by Tim
After further research, what I am doing appears to be fine. A 1/3 drive can sink about 8-10 ma. A Full drive output can source up to about 60ma. Connecting
Re: [68300] Intentional momentary I/O contention
2005-04-05 by Robert Yablonski
Tim, I would not do this. It creates a lot of noise on the board. You are trying to force 100ma thru two pins on the processor. The pins rated at 10ma will
Intentional momentary I/O contention
2005-04-05 by Tim
Hello all, This isn t actually a question about the 683xx, but for the HCS12DP256. Some I/O pins have the capability of full (10ma) drive and 1/3 drive
Re: [68300] TPU channel failure
2005-03-11 by Tim Flynn
Haven t seen that exactly. But I wouldn t be surprised. Perhaps a (now) bad protection diode. Tim
TPU channel failure
2005-03-10 by Rod.Niner@gsescales.spx.com
I have a 68332 with a TPU channel running DIO function (we run all functions from RAM). It set to be an input. I have one unit where it appears that the
Re: [68300] Setting up External RAM
2005-03-03 by Bob Smith
... The usual method of interfacing to _external_ RAM is to attach address and data lines to the address and data bus on the 332. The Chip Enable (CE) line
Re: [68300] Setting up External RAM
2005-03-02 by Steve Russell
To access external RAM, you need to set up the chip selects properly. To do this, you need to know how the hardware of your target is connected to the external
Setting up External RAM
2005-03-02 by palehorse_johnsoga
I hope someone can help me. I am working on a project using the 68332. It has FLASH ROM at addressed 0x0 - 0x8000 and Internal RAM at FFE000 or something
Re: [68300] 68HC16 Eval Board For Sale (Super cheap)
2005-01-11 by Bob Smith
Chris -- I think you will get more hits on your Ebay auction if you would include the complete URL, like so --
68HC16 Eval Board For Sale (Super cheap)
2005-01-11 by chris_c_willis
Listed on ebay. Search for Motorola 68HC16 / 68300 Eval Board Listing #3866572209
Re: [68300] 68332 and DSACK
2005-01-07 by development
Hi Luc, It is possible to use DSACK0 as a Bus control signal and DSACK1 as a PortE signal. If you are using DSACKx signals you have to ensure that the proper
68332 and DSACK
2005-01-06 by decaissenpierre
Hi, Does anybody know whether it is possible to use DSACK0 only as Bus Control Signal and leave DSACK1 as Port E Signal. I m re-designing an existing board on
Re: [68300] Debugger recommendations?
2004-11-23 by Tim Flynn
I use the 376. Great processor. As for debugger, I use the visionClick/visionProbe setup. I have used the Metrowerks and evaluated SingleStep. I generally use
Debugger recommendations?
2004-11-23 by Scott Newell
A friend is gearing up for a 376 project. I ve provided him with some 332 hardware, a prebuilt gcc toolchain (from the rtems project), and some basic
RE: [68300] cpu32 vs cpu32+ instruction set
2004-11-20 by Melear Charles-rdph40
Aaron, There is exactly ZERO difference between the CPU32 and the CPU32+ instruction set. The difference is with the external bus structure. Regards, Charlie
cpu32 vs cpu32+ instruction set
2004-11-20 by Aaron J. Grier
I m attempting to come up with a canonical breakdown of the various members of the 68k family by chip vs instruction set. are the instruction sets for CPU32
Re: Coldfire newsgroup.
2004-10-26 by Aaron J. Grier
... try http://www.WildRice.com/ColdFire/ . -- Aaron J. Grier | Frye Electronics, Tigard, OR | aaron@frye.com Note that many bands backline amps